Google Git
Sign in
opensecura/3p/openxla/iree/HEAD
  1. 521a892 Integrate LLVM to llvm/llvm-project@831ed97b1215 (#24603) by Roberto Laudani · 5 hours ago main
  2. 5d9eaee [Codegen][CPU] Seed C-bitcode ukernel framework with bf16 and i8 seeds. (#24567) by Benoit Jacob · 22 hours ago latest-snapshot
  3. 4495c73 [SPIRV] Add target-feature cli option (#24598) by Tobias Fuchs · 23 hours ago
  4. 196c18a [Runtime] Align `iree_async_posix_worker_t` (#24589) by Rechie Kho · 27 hours ago
  5. 85a352f Integrate LLVM to llvm/llvm-project@696f4d562847 (#24599) by Stefan Schuermans · 29 hours ago
  6. 8c4631e [SPIRV][GPU] Add Mali G720 and other Arm 5 Gen target details (#24595) by Artem Gindinson · 30 hours ago
  7. 964b7ad [HAL] Add missing bufferUsage for Mapping in tryAddSharedUsageBits (#24549) by Tobias Fuchs · 2 days ago
  8. 9550dfb [Vulkan][SPIRV] Add initial LIT for known Vulkan target features (Arm GPUs) by Artem Gindinson · 2 days ago
  9. c396087 [Doc] Update YouTube channel link in README (#24597) by Ege Beysel · 2 days ago
  10. 5c799b6 [Runtime] Unify dtype handling in Python bindings (#24587) by Florian Walbroel · 2 days ago
  11. 6947214 Integrate LLVM to llvm/llvm-project@917117ceeebf (#24588) by Stefan Schuermans · 2 days ago
  12. 8365d65 [Codegen][CPU] Rename LLVMCPU/Builtins -> builtins to mirror GPU plugin layout. (#24586) by Benoit Jacob · 3 days ago
  13. f6395fd fix(CI): long-running emulated rv64 matmul integration tests (#24593) by Ege Beysel · 3 days ago
  14. a9e91ec [LLVMGPU] Add sm_120 TileAndFuse config coverage, consolidate MMA sync pipeline tests (#24577) by WMC · 3 days ago
  15. b32ca40 [LLVMCPU][RISCV] Add RVV int8 vector-contract custom kernels for widening i8*i8->i32 matmul (#23734) by Agustin Nahuel Coppari Hollmann · 4 days ago
  16. c1c962b [Codegen][CPU] Fold reshapes into map_store per reassociation group. (#24535) by Benoit Jacob · 7 days ago
  17. c675333 [Codegen][CPU] Add x86 AVX-512 VNNI 16x16x2 i8 MMA intrinsic. (#24534) by Benoit Jacob · 7 days ago
  18. d4ee61f [Codegen][CPU] Fold reshape-containing encoding relayouts to map_store. (#24533) by Benoit Jacob · 7 days ago
  19. 4bced69 [Runtime][Python] Add pyright checks and fix errors (#24561) by Florian Walbroel · 9 days ago
  20. 9dd025b Bump actions/checkout from 6.0.2 to 6.0.3 in the github-actions group (#24563) by dependabot[bot] · 9 days ago
  21. 37b8c2c [GlobalOpt][NFC] Update option description for matmul generalization (#24565) by Artem Gindinson · 9 days ago
  22. c0348f8 [Codegen] Add test for `map_store` transformation of scalable pack ops (#24564) by Ege Beysel · 9 days ago
  23. 01baf0e [Runtime] Revive thread-safety analysis (#24560) by Tobias Fuchs · 9 days ago
  24. 8e158ad [Bazel] Add rt python bindings to bazel (#24553) by maxbartel · 9 days ago
  25. 5eb55e7 [CodeGen][SPIRV] Improved Matmul Tiling Heuristic for VideoCoreVII (#24559) by Christopher McGirr · 9 days ago
  26. fcdfe32 Integrate LLVM to llvm/llvm-project@c4484e842274 (#24562) by Stefan Schuermans · 10 days ago
  27. dda3d32 [Codegen][CPU] Flatten contiguous trailing dims of transfers before unrolling. (#24517) by Benoit Jacob · 10 days ago
  28. cc50107 [Codegen][CPU] Route inner_tiled broadcast into m_bcst-foldable slot. (#24516) by Benoit Jacob · 10 days ago
  29. 6e6d854 [C++20 compat] avoid capture clauses not valid in C++20 (#24557) by Stefan Schuermans · 10 days ago
  30. 4a18a3b Integrate LLVM to llvm/llvm-project@90779840d51a (#24558) by Stefan Schuermans · 10 days ago
  31. 7241637 [Doc] Fix 'eenvironments' typos in main documentation pages (#24550) by Artem Gindinson · 10 days ago
  32. bdaa783 Fix typo `mamtul`->`matmul`. (#24556) by Jerry Shih · 10 days ago
  33. d2badb8 [CUDA] Adds initial CUDA target recognition for NVIDIA sm_120 / Blackwell (#24525) by WMC · 11 days ago
  34. b21fa2a [CUDA] Add sm_121/Blackwell to known target (#24523) by Cheng-Yu Tsai · 12 days ago
  35. d7c7b98 [Security] Fix uint64 additive overflow in VM bytecode rodata segment verifier (#24551) by 0xASTRA · 13 days ago
  36. e8aea9c [docs] Add blog post for VDMFMA (#24547) by Eric · 14 days ago
  37. bb3a0d9 [Codegen] Split StableHLO/JAX select-style argmax reductions (#24445) by Yuwei Sun · 14 days ago
  38. 0f4ceac [Codegen][SPIRV] Add Initial Conv2d Tiling for VideocoreVII (#24548) by Christopher McGirr · 14 days ago
  39. cd279e2 [SPIRV] Add llvmpipe as known target (#24542) by Tobias Fuchs · 2 weeks ago
  40. aff8e47 [Runtime] Print allocator statistics for all devices (#24521) by Tobias Fuchs · 2 weeks ago
  41. f6d7fcd [Runtime] Guard against NULL frontier_tracker in standalone HIP/CUDA devices (#24474) by Abhishek Varma · 2 weeks ago
  42. ab587dc [HAL] Implement functions to normalize buffer references and buffer bindings to subspan buffers (#24472) by Stefan Schuermans · 2 weeks ago
  43. 224e04c Add chipDetails for RDNA3 (#24419) by RattataKing · 2 weeks ago
  44. 3f050f0 [LLVMCPU] fix: return valid vscale range only for targets supporting SVE (#24522) by ziereis · 2 weeks ago
  45. 023747d Integrate LLVM to llvm/llvm-project@191aa295d9c9 (#24546) by Stefan Schuermans · 2 weeks ago
  46. 570c79b [Codegen][SPIRV] Add Broadcom VideoCore VII GPU target (#24541) by Christopher McGirr · 2 weeks ago
  47. de8d343 Bump ad-m/github-push-action from 1.1.0 to 1.3.0 in the github-actions group (#24536) by dependabot[bot] · 2 weeks ago
  48. dae7ace [CI] Fix spirv rocm filter when rocm is not build (#24544) by maxbartel · 2 weeks ago
  49. 99f9904 [docs] Add constraints intro in the tuning loop (#24545) by RattataKing · 2 weeks ago
  50. 8f6eaf0 [Codegen][Tuner] Add codegen flag to emit pipeline constraints in configured IR (#24539) by RattataKing · 2 weeks ago
  51. b059222 [Codegen] Use default read semantics for LinalgExt scatter (#24504) by Hao Ren · 2 weeks ago
  52. 5af287e Integrate LLVM to llvm/llvm-project@6bbbf743ae49 (#24540) by Stefan Schuermans · 2 weeks ago
  53. 82f1670 [Preprocessing] Add PromoteLinalgOutputsPass (#23824) by Han-Kuan Chen · 2 weeks ago
  54. 0edf1fd [Codegen][NFC] Move DropSchedulePass into Codegen/Common (#24501) by Alex · 2 weeks ago
  55. 782235c Integrate LLVM to llvm/llvm-project@28d6673e21f7 (#24530) by Stefan Schuermans · 2 weeks ago
  56. d33466b [Codegen][Tuner] Add extra config attributes to the constraint knobs (#24538) by RattataKing · 2 weeks ago
  57. bce426c [Aarch64] Fix release CI (#24537) by maxbartel · 2 weeks ago
  58. 48e60e5 [Runtime][Python] Convert numpy.uint8 to ABI type i8 (#24524) by Florian Walbroel · 2 weeks ago
  59. d0b3a91 [Codegen][Tuner] Add TileAndFuse constraints for conv (#24526) by RattataKing · 3 weeks ago
  60. b13cd9c [Codegen] Add VectorDistribute constraints for attention (#24528) by Bangtian Liu · 3 weeks ago
  61. 370c94f [CI][Windows] Fix failing windows build after runner update (#24529) by maxbartel · 3 weeks ago
  62. 332d560 [Codegen] Add v0 TileAndFuse constraints for mamtul (#24519) by RattataKing · 3 weeks ago
  63. 2098bbe [VM] Add VMASM roundtrip tooling (#24508) by Ben Vanik · 3 weeks ago
  64. 87fa866 [ROCM][Codegen] Add experimental amdgcn SPIR-V path (#24499) by lua1235 · 3 weeks ago
  65. 398a054 [VectorDistribute] Rework LDS operand promotion (#24408) by Lukas Sommer · 3 weeks ago
  66. 5e1a576 [HAL] Refactor HAL executable exports to function IDs (#24507) by Ben Vanik · 3 weeks ago
  67. fb48f10 [Codegen] Add v0 VectorDistribute constraints for mamtul (#24484) by RattataKing · 3 weeks ago
  68. f0103e8 [Codegen][CPU] Drop the power-of-two cap on `chooseUnrolling`. (#24495) by Benoit Jacob · 3 weeks ago
  69. e8ac558 [Codegen][CPU] Add x86 AVX-512 VNNI vpdpbusd MMA intrinsic. (#24494) by Benoit Jacob · 3 weeks ago
  70. 382a147 Bump benc-uk/workflow-dispatch from 1.3.1 to 1.3.2 in the github-actions group (#24506) by dependabot[bot] · 3 weeks ago
  71. d9a3dd1 [WebGPU] Add WebGPU HAL driver, WGSL compiler target, CTS, and sample. (#24463) by Ben Vanik · 4 weeks ago
  72. 3309b33 [Vulkan] Refinement: planning, feature discovery, and device contracts (#24505) by Ben Vanik · 4 weeks ago
  73. 4c7d716 [HIP] XFAIL stream transient buffer fill CTS by Ben Vanik · 4 weeks ago
  74. 85183d8 [Vulkan] Keep queue affinity diagnostics size-safe by Ben Vanik · 4 weeks ago
  75. 0653426 [LLVMCPU] Append user-specific cpu-features after the supported features from a cpu name. (#24473) by Jerry Shih · 4 weeks ago
  76. eceec46 [Vulkan] Report shaderBFloat16 features by Ben Vanik · 4 weeks ago
  77. 6601da0 [Vulkan] Accept Vulkan memory model for BDA SPIR-V by Ben Vanik · 4 weeks ago
  78. 208821b [Vulkan] Report storageBuffer16BitAccess by Ben Vanik · 4 weeks ago
  79. d763be6 [Vulkan] Report cooperative matrix device profiles by Ben Vanik · 4 weeks ago
  80. db79c1b [Vulkan] Remove symbol checks from capability gates by Ben Vanik · 4 weeks ago
  81. 0b8f4a4 [Vulkan] Group logical device profiling state by Ben Vanik · 4 weeks ago
  82. e2185c4 [Vulkan] Group logical device queue state by Ben Vanik · 4 weeks ago
  83. 24f5d35 [Vulkan] Extract device option policy by Ben Vanik · 4 weeks ago
  84. 595a284 [Vulkan] Extract physical device selection by Ben Vanik · 4 weeks ago
  85. 985a610 [Vulkan] Resolve queue affinities to lanes by Ben Vanik · 4 weeks ago
  86. 9815551 [Vulkan] Replay debug groups as labels by Ben Vanik · 4 weeks ago
  87. 83bc367 [Vulkan] Add debug utils capabilities by Ben Vanik · 4 weeks ago
  88. cc53832 [Vulkan] Carry request flags through device plans by Ben Vanik · 4 weeks ago
  89. 11465e7 [Vulkan] Split request flags from device features by Ben Vanik · 4 weeks ago
  90. d66c403 [Vulkan] Share logical device initialization by Ben Vanik · 4 weeks ago
  91. ab7cf9c [Vulkan] Extract logical device planning by Ben Vanik · 4 weeks ago
  92. a4bf709 [Vulkan] Document device compatibility by Ben Vanik · 4 weeks ago
  93. b46def4 [Vulkan] HAL Rewrite (#24459) by Ben Vanik · 4 weeks ago
  94. 3f160df [Codegen] Remove deprecated transform.iree.match_callback tests (#24500) by Alex · 4 weeks ago
  95. aefe97b [AMDGPU] Embed prebuilt AMDGPU device binaries (#24498) by Ben Vanik · 4 weeks ago
  96. 5ca9369 [VM] Retain bytecode modules for rodata refs by Ben Vanik · 4 weeks ago
  97. cff4b04 [Codegen][CPU] Add e2e matmul tests for the inner_tiled lowering path. (#24492) by Benoit Jacob · 4 weeks ago
  98. 7af48c8 [Codegen][CPU] Run HoistInnerTiledAccReshapes before vector lowering. (#24491) by Benoit Jacob · 4 weeks ago
  99. d72ba55 [Codegen][GPU] Verify per-allocation swizzle hint consistency (#24460) by Zhewen Yu · 4 weeks ago
  100. 3546cbf [LinalgExt] Initialize top-k output values in test by Ben Vanik · 4 weeks ago