- f453ab3 [fpga] Refactor quirks in MMI file generator by Dan McArdle · 2 years, 5 months ago
- d9a65f6 [fpga] Fix OTP-specific behavior in MMI file generator by Dan McArdle · 2 years, 5 months ago
- 099463e [fpga] Enable splicing OTP images into bitstream by Dan McArdle · 2 years, 8 months ago
- d732540 [fpga, doc, util] Remove refs and utils related to NexysVideo FPGA board by Pirmin Vogel · 2 years, 10 months ago
- 8866166 [aes] Restore placement constraints by Alexander Williams · 3 years ago
- e18d88b [usbdev] Fix up packet responses for compliance by Alexander Williams · 3 years, 2 months ago
- 961b2cd [sw/boot_rom] Rename "boot_rom" to "test_rom". by Timothy Trippel · 3 years, 3 months ago
- 1330f85 [fpga] Update slice to work with 32kB ROM by Miguel Osorio · 3 years, 4 months ago
- 9c2807d [fpga] Update Vivado hooks to match BMEM count by Miguel Osorio · 3 years, 5 months ago
- 52e5b21 [fpga] Remove placement constraints for Boot ROM by Pirmin Vogel · 3 years, 6 months ago
- 620dee7 [fpga] Enable ROM splicing for scrambled boot ROMs by Pirmin Vogel · 3 years, 6 months ago
- 35e4902 [fpga] Automatically dump MMI for boot ROM splicing flow by Timothy Chen · 5 years ago
- f064bcc [fpga] Modify Boot ROM placement and checking by Pirmin Vogel · 3 years, 6 months ago
- 54c37c4 [rom_ctrl] Cut the instantiated ROM width back down to 39 bits by Rupert Swarbrick · 3 years, 8 months ago
- 830aac5 [rom_ctrl] Instantiate scrambling primitives for rom_ctrl by Rupert Swarbrick · 4 years ago
- 93fe50c [top/chip] Rename chip-level tops by Michael Schaffner · 4 years ago
- 9855d4b [rom_ctrl] Add initial RTL by Rupert Swarbrick · 4 years, 3 months ago
- 20972a6 [fpga/otp] Add OTP preloading to NexysVideo FPGA flow by Michael Schaffner · 4 years ago
- d631dec [fpga] Add timestamp for bitstream identification via USR_ACCESS reg by Pirmin Vogel · 4 years, 1 month ago
- 60b4509 [fpga] Raise severity of create_clock failures to error by Pirmin Vogel · 4 years, 1 month ago
- de15468 [top] Fix reference and doc for top_earlgrey_reduce.py script by Pirmin Vogel · 4 years, 1 month ago
- f835aa3 [fpga] deploy size reduction script for fpga by Timothy Chen · 4 years, 2 months ago
- 1a24c1e [util] Adapt flash size reduce/check scripts for changes in flash params by Pirmin Vogel · 4 years, 3 months ago
- cbe570b [usbdev] Test on NexysVideo with TUSB1106 USB PHY PMOD by Mark Hayter · 4 years, 3 months ago
- ebe4e36 [usbdev] Fixes for pin config sims to pass by Mark Hayter · 4 years, 3 months ago
- 20706b0 [util / sw] Flash template updates by Timothy Chen · 4 years, 4 months ago
- eb1eba3 [fpga] Add Vivado pre-synthesis hook, also setup hooks for CW305 board by Pirmin Vogel · 4 years, 4 months ago
- 41095fb [top/fpga] Make sure SW is aware of reduced flash size on small FPGAs by Pirmin Vogel · 4 years, 5 months ago
- 098128c Revert "Revert "[usbdev] Fixes for I/O modes and expand their tests"" by Pirmin Vogel · 4 years, 5 months ago
- 8520647 [fpga] Reduce the main system clock frequency to 10 MHz by Pirmin Vogel · 4 years, 5 months ago
- d2e1184 Revert "[usbdev] Fixes for I/O modes and expand their tests" by Philipp Wagner · 4 years, 5 months ago
- 66c5092 [usbdev] Fixes for I/O modes and expand their tests by Mark Hayter · 4 years, 8 months ago
- ceeb592 [top/fpga] Add scripts to reduce and check flash size for small FPGAs by Pirmin Vogel · 4 years, 7 months ago
- 74beb90 [top_earlgrey] Create bitstreams with failing timing by Philipp Wagner · 4 years, 9 months ago
- 0beb8a4 [prim_rom] Propagate port changes to top level and FPGA scripts by Michael Schaffner · 4 years, 9 months ago
- 196dca6 [fpga] Addressing minor nits missed in earlier commit b95a71c by Ram Penugonda · 5 years ago
- 1b1de66 [top_earlgrey] BRAM implementation FPGA check for ROM memory by Ram Penugonda · 5 years ago
- f504021 [top_earlgrey] Check timing before bitstream generation by Philipp Wagner · 5 years ago
