| commit | d2e1184308b9582551252d1135a126ea558a6ab8 | [log] [tgz] |
|---|---|---|
| author | Philipp Wagner <phw@lowrisc.org> | Tue Sep 29 21:21:43 2020 +0100 |
| committer | Philipp Wagner <mail@philipp-wagner.com> | Tue Sep 29 22:56:07 2020 +0100 |
| tree | ce0350732bd515bf78479aaa7c7093b4213b03aa | |
| parent | b102d9b34ffb76248d6c3475ebbc7aa59695a3c0 [diff] |
Revert "[usbdev] Fixes for I/O modes and expand their tests" This reverts commit 66c509296798cdd9dbeba4deeb381d0cecf3b429. This commit is suspected to increase FPGA synthesis times by 2x and seems to cause routing congestion. We'll need to have a closer look what's going on there, but revert the change first to get CI latencies back to normal. Signed-off-by: Philipp Wagner <phw@lowrisc.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
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