Move vector.repl to springbok.repl. Add OSS headers Change-Id: Ie7891b0abfe0cc31e0cc4bb61387b666fe96c27d
diff --git a/platforms/shodan.repl b/platforms/shodan.repl index b056767..226e302 100644 --- a/platforms/shodan.repl +++ b/platforms/shodan.repl
@@ -1,6 +1,6 @@ using "sim/config/platforms/smc.repl" using "sim/config/platforms/secure.repl" -using "sim/config/platforms/vector.repl" +using "sim/config/platforms/springbok.repl" // Core 0 Mailbox [‘h400F_0000 - ‘h400F_0020) 32B mailbox0: Mailbox @ sysbus 0x400F0000
diff --git a/platforms/springbok.repl b/platforms/springbok.repl index 7fe5801..ce6d50a 100644 --- a/platforms/springbok.repl +++ b/platforms/springbok.repl
@@ -1 +1,61 @@ -using "sim/config/platforms/vector.repl" +// Copyright 2022 Google LLC +// +// Licensed under the Apache License, Version 2.0 (the "License"); +// you may not use this file except in compliance with the License. +// You may obtain a copy of the License at +// +// http://www.apache.org/licenses/LICENSE-2.0 +// +// Unless required by applicable law or agreed to in writing, software +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + +// *************************************************** +// Springbok +// *************************************************** + +cpu2: CPU.SpringbokRiscV32 @ sysbus + hartId: 2 + +// TODO(b/214092253): IMEM size blow-up needs to be addressed. +//RAM_VEC_IMEM [‘h3200_0000 - ‘h320F_FFFF) 1MB RAM for Vector core Instruction +// Remember to update hart_is_vc in rom_crt.S if this changes. +ram_vec_imem: Memory.MappedMemory @ sysbus 0x32000000 + size: 0x00100000 + +// TODO(b/196910893): Revert the temporary change on DMEM memory later +//RAM_VEC_DMEM [‘h3400_0000 - ‘h34FF_FFFF) 16MB RAM for Vector core Data +ram_vec_dmem: Memory.MappedMemory @ sysbus 0x34000000 + size: 0x01000000 + +//RAM_VEC_CSR [‘h3800_0000 - ‘h3800_0FFF) 4KB RAM for SMC core data storage +ram_vec_csr: Memory.MappedMemory @ sysbus 0x38000000 + size: 0x00001000 + +// TODO(jonathantate): The addresses for these WindowMMUs are not final while we +// figure out how to have different memory maps for vector core / SMC with +// Renode. From the vector core's point of view, the WindowMMUs should be at +// 0x30000000/0x34000000 for IMMU/DMMU respectively, but from the SMC's point of +// view that should be where the instruction/data TCMs are. +vec_immu : CPU.SpringbokRiscV32_WindowMMU @ sysbus 0x33000000 + tcm: ram_vec_imem + windowSize: 0x10000 + tcmSize: 0x10000 + pageSize: 0x400 + numWindows: 2 + +vec_dmmu : CPU.SpringbokRiscV32_WindowMMU @ sysbus 0x35000000 + tcm: ram_vec_dmem + windowSize: 0x400000 + tcmSize: 0x400000 + pageSize: 0x400 + numWindows: 4 + +vec_controlblock : CPU.SpringbokRiscV32_ControlBlock @ sysbus 0x47000000 + core: cpu2 + imem: ram_vec_imem + dmem: ram_vec_dmem + immu: vec_immu + dmmu: vec_dmmu
diff --git a/platforms/vector.repl b/platforms/vector.repl deleted file mode 100644 index cd43ab8..0000000 --- a/platforms/vector.repl +++ /dev/null
@@ -1,47 +0,0 @@ -// *************************************************** -// Vector -// *************************************************** - -cpu2: CPU.SpringbokRiscV32 @ sysbus - hartId: 2 - -// TODO(b/214092253): IMEM size blow-up needs to be addressed. -//RAM_VEC_IMEM [‘h3200_0000 - ‘h320F_FFFF) 1MB RAM for Vector core Instruction -// Remember to update hart_is_vc in rom_crt.S if this changes. -ram_vec_imem: Memory.MappedMemory @ sysbus 0x32000000 - size: 0x00100000 - -// TODO(b/196910893): Revert the temporary change on DMEM memory later -//RAM_VEC_DMEM [‘h3400_0000 - ‘h34FF_FFFF) 16MB RAM for Vector core Data -ram_vec_dmem: Memory.MappedMemory @ sysbus 0x34000000 - size: 0x01000000 - -//RAM_VEC_CSR [‘h3800_0000 - ‘h3800_0FFF) 4KB RAM for SMC core data storage -ram_vec_csr: Memory.MappedMemory @ sysbus 0x38000000 - size: 0x00001000 - -// TODO(jonathantate): The addresses for these WindowMMUs are not final while we -// figure out how to have different memory maps for vector core / SMC with -// Renode. From the vector core's point of view, the WindowMMUs should be at -// 0x30000000/0x34000000 for IMMU/DMMU respectively, but from the SMC's point of -// view that should be where the instruction/data TCMs are. -vec_immu : CPU.SpringbokRiscV32_WindowMMU @ sysbus 0x33000000 - tcm: ram_vec_imem - windowSize: 0x10000 - tcmSize: 0x10000 - pageSize: 0x400 - numWindows: 2 - -vec_dmmu : CPU.SpringbokRiscV32_WindowMMU @ sysbus 0x35000000 - tcm: ram_vec_dmem - windowSize: 0x400000 - tcmSize: 0x400000 - pageSize: 0x400 - numWindows: 4 - -vec_controlblock : CPU.SpringbokRiscV32_ControlBlock @ sysbus 0x47000000 - core: cpu2 - imem: ram_vec_imem - dmem: ram_vec_dmem - immu: vec_immu - dmmu: vec_dmmu
diff --git a/springbok.resc b/springbok.resc index 1b8ea66..953141a 100644 --- a/springbok.resc +++ b/springbok.resc
@@ -1,3 +1,17 @@ +# Copyright 2022 Google LLC +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http:#www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. + # Renode script for testing the Springbok Vector Core mach create "springbok"