blob: 1b8ea66216c690b2d05c086ae93deba0c0dcabc2 [file]
# Renode script for testing the Springbok Vector Core
mach create "springbok"
EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.RiscV32"
include @sim/config/shodan_infrastructure/SpringbokRiscV32_WindowMMU.cs
EnsureTypeIsLoaded "Antmicro.Renode.Peripherals.CPU.SpringbokRiscV32_WindowMMU"
include @sim/config/shodan_infrastructure/SpringbokRiscV32.cs
$platformfile?=@sim/config/platforms/springbok.repl
machine LoadPlatformDescription $platformfile
$bin?=@out/springbok/hello_vec/hello_vec.elf
sysbus.cpu2 EnableRiscvOpcodesCounting
macro reset
"""
sysbus LoadELF $bin
# Start the vector core at address 0 of its instruction TCM.
sysbus.cpu2 IsHalted true
sysbus.cpu2 PC 0x32000000
"""
runMacro $reset