hdl/verilog/rvv/BUILD

# Copyright 2024 Google LLC
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
#     http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.

load("@rules_hdl//verilog:providers.bzl", "verilog_library")
load("//rules:vcs.bzl", "vcs_testbench_test")

verilog_library(
    name = "aligner",
    srcs = [
        "Aligner.sv",
    ],
    visibility = ["//visibility:public"],
)

vcs_testbench_test(
    name = "aligner_tb",
    srcs = ["Aligner_tb.sv"],
    module = "Aligner_tb",
    deps = ":aligner",
)