Kelvin HW design

Clone this repo:
  1. 5ff18fa Fix the latch issue in Slice by Yenkai Wang · 2 days ago master
  2. ef7ec3f Eliminate inferred latches in Dvu. by Derek Chow · 2 days ago
  3. 423cd18 Remove latching behaviour in Regfile. by Derek Chow · 3 days ago
  4. c8cc22e Add include guards for svh files and fix errors. by Derek Chow · 10 days ago
  5. 118fe40 Move Aligner and MultiFifo into design. by Derek Chow · 10 days ago

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog