fpga/ip/kelvin_tlul/kelvin_tlul.core

CAPI=2:
name: "kelvinv2:ip:kelvin_tlul:0.1"
description: "Kelvin TL-UL components"

filesets:
  rtl:
    depend:
      - "lowrisc:tlul:headers"
    files:
      - kelvin_tlul_pkg_128.sv
      - kelvin_tlul_pkg_32.sv
      - tlul_fifo_async_128.sv
      - tlul_fifo_sync_128.sv
      - tlul_socket_1n_128.sv
      - tlul_socket_m1_128.sv
    file_type: systemVerilogSource

targets:
  default:
    filesets:
      - rtl