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Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +01001// Copyright lowRISC contributors.
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5module tb;
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +01006 // dep packages (test)
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +01007 import uvm_pkg::*;
8 import dv_utils_pkg::*;
9 import otbn_env_pkg::*;
10 import otbn_test_pkg::*;
11
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010012 // dep packages (rtl)
13 import otbn_reg_pkg::*;
Greg Chadwickb168ae92021-04-14 16:04:03 +010014 import edn_pkg::*;
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010015
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +010016 // macro includes
17 `include "uvm_macros.svh"
18 `include "dv_macros.svh"
19
20 wire clk, rst_n;
Rupert Swarbrick41fd2b02020-12-03 12:16:39 +000021 wire idle, intr_done;
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010022 wire [NUM_MAX_INTERRUPTS-1:0] interrupts;
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +010023
24 // interfaces
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010025 clk_rst_if clk_rst_if (.clk(clk), .rst_n(rst_n));
26 tl_if tl_if (.clk(clk), .rst_n(rst_n));
27 pins_if #(1) idle_if (idle);
28 pins_if #(NUM_MAX_INTERRUPTS) intr_if (interrupts);
Rupert Swarbrick41fd2b02020-12-03 12:16:39 +000029 assign interrupts[0] = {intr_done};
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010030
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +000031 otbn_model_if #(
32 .ImemSizeByte (otbn_reg_pkg::OTBN_IMEM_SIZE)
33 ) model_if (
34 .clk_i (clk),
35 .rst_ni (rst_n)
36 );
37
Weicai Yang0ae8ef52020-11-17 20:53:29 -080038 `DV_ALERT_IF_CONNECT
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +010039
Greg Chadwickb168ae92021-04-14 16:04:03 +010040 // Mock up EDN that just instantly returns fixed data when requested
41 // TODO: Provide a proper EDN agent
42 edn_req_t edn_rnd_req;
43 edn_rsp_t edn_rnd_rsp;
44
45 edn_req_t edn_urnd_req;
46 edn_rsp_t edn_urnd_rsp;
47
48 assign edn_rnd_rsp.edn_ack = edn_rnd_req.edn_req;
49 assign edn_rnd_rsp.edn_fips = 1'b0;
50 assign edn_rnd_rsp.edn_bus = 32'h99999999;
51
52 assign edn_urnd_rsp.edn_ack = edn_urnd_req.edn_req;
53 assign edn_urnd_rsp.edn_fips = 1'b0;
54 assign edn_urnd_rsp.edn_bus = 32'h99999999;
55
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +010056 // dut
57 otbn dut (
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010058 .clk_i (clk),
59 .rst_ni (rst_n),
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +010060
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010061 .tl_i (tl_if.h2d),
62 .tl_o (tl_if.d2h),
63
64 .idle_o (idle),
65
66 .intr_done_o (intr_done),
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010067
68 .alert_rx_i (alert_rx),
Greg Chadwickb168ae92021-04-14 16:04:03 +010069 .alert_tx_o (alert_tx),
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +010070
Greg Chadwickb168ae92021-04-14 16:04:03 +010071 .clk_edn_i (clk),
72 .rst_edn_ni (rst_n),
73 .edn_rnd_o ( edn_rnd_req ),
74 .edn_rnd_i ( edn_rnd_rsp ),
75
76 .edn_urnd_o ( edn_urnd_req ),
77 .edn_urnd_i ( edn_urnd_rsp )
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +010078 );
79
Rupert Swarbrick5c9aa752021-06-03 12:03:59 +010080 bind dut.u_otbn_core otbn_trace_if #(
Rupert Swarbrick660baa92020-12-15 17:00:55 +000081 .ImemAddrWidth (ImemAddrWidth),
82 .DmemAddrWidth (DmemAddrWidth)
83 ) i_otbn_trace_if (.*);
84
Rupert Swarbrick5c9aa752021-06-03 12:03:59 +010085 bind dut.u_otbn_core otbn_tracer u_otbn_tracer(.*, .otbn_trace(i_otbn_trace_if));
Greg Chadwickb168ae92021-04-14 16:04:03 +010086
Rupert Swarbricke97c4f52021-06-03 12:30:54 +010087 bind dut.u_otbn_core.u_otbn_controller.u_otbn_loop_controller
88 otbn_loop_if i_otbn_loop_if (
89 .clk_i (clk_i),
90 .rst_ni (rst_ni),
91 // The insn_addr_i signal in the loop controller is of width ImemAddrWidth. We expand it to a
92 // 32-bit address here to avoid having to parameterise the type of the interface.
93 .insn_addr (32'(insn_addr_i)),
94 .at_current_loop_end_insn (at_current_loop_end_insn)
95 );
96
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +000097 // OTBN model, wrapping an ISS.
98 //
99 // Note that we pull the "start" signal out of the DUT. This is because it's much more difficult
100 // to grab the decoded signal from TL transactions on the cycle it happens. We have an explicit
101 // check in the scoreboard to ensure that this gets asserted at the time we expect (to spot any
102 // decoding errors).
Greg Chadwick3b58f202021-04-30 12:14:21 +0100103 assign model_if.start = dut.start_q;
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +0000104
Greg Chadwickb168ae92021-04-14 16:04:03 +0100105 // Internally otbn_core uses a 256-bit width interface for EDN data. This maps to muliple EDN
106 // requests at this level (via a packing FIFO internal to otbn). The model works with the internal
107 // otbn_core interface so probe into it here to provide the relevant signals to the model.
108 logic edn_rnd_data_valid;
109 logic edn_urnd_data_valid;
110
111 assign edn_rnd_data_valid = dut.edn_rnd_req & dut.edn_rnd_ack;
112 assign edn_urnd_data_valid = dut.edn_urnd_req & dut.edn_urnd_ack;
113
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +0000114 otbn_core_model #(
115 .DmemSizeByte (otbn_reg_pkg::OTBN_DMEM_SIZE),
116 .ImemSizeByte (otbn_reg_pkg::OTBN_IMEM_SIZE),
Rupert Swarbrick04b1c252021-03-18 12:22:34 +0000117 .MemScope ("..dut"),
118 .DesignScope ("..dut.u_otbn_core")
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +0000119 ) u_model (
120 .clk_i (model_if.clk_i),
121 .rst_ni (model_if.rst_ni),
122
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +0000123 .start_i (model_if.start),
124 .done_o (model_if.done),
125 .start_addr_i (model_if.start_addr),
Greg Chadwickb168ae92021-04-14 16:04:03 +0100126 .err_o (model_if.err),
127
128 .edn_rnd_data_valid_i (edn_rnd_data_valid),
129 .edn_rnd_data_i (dut.edn_rnd_data),
130 .edn_urnd_data_valid_i (edn_urnd_data_valid)
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +0000131 );
132
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +0100133 initial begin
134 // drive clk and rst_n from clk_if
135 clk_rst_if.set_active();
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +0100136
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +0100137 uvm_config_db#(virtual clk_rst_if)::set(null, "*.env", "clk_rst_vif", clk_rst_if);
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +0100138 uvm_config_db#(virtual tl_if)::set(null, "*.env.m_tl_agent*", "vif", tl_if);
139 uvm_config_db#(idle_vif)::set(null, "*.env", "idle_vif", idle_if);
140 uvm_config_db#(intr_vif)::set(null, "*.env", "intr_vif", intr_if);
Rupert Swarbrickb0d28af2020-10-29 17:10:02 +0000141 uvm_config_db#(virtual otbn_model_if)::set(null, "*.env.model_agent", "vif", model_if);
Rupert Swarbrick3548b1e2020-10-08 16:55:44 +0100142
Rupert Swarbrick5c9aa752021-06-03 12:03:59 +0100143 uvm_config_db#(virtual otbn_trace_if)::set(null, "*.env", "trace_vif",
144 dut.u_otbn_core.i_otbn_trace_if);
Rupert Swarbricke97c4f52021-06-03 12:30:54 +0100145 uvm_config_db#(virtual otbn_loop_if)::set(
146 null, "*.env", "loop_vif",
147 dut.u_otbn_core.u_otbn_controller.u_otbn_loop_controller.i_otbn_loop_if);
Rupert Swarbrick5c9aa752021-06-03 12:03:59 +0100148
Rupert Swarbrickd8bfaf12020-09-21 12:53:35 +0100149 $timeformat(-12, 0, " ps", 12);
150 run_test();
151 end
152
153endmodule