[otbn] Add lock-step comparisons between RTL and ISS
To do this, we wire up a new consumer for trace items called the
"trace checker". This is a singleton class to allow the ISS wrapper
to get hold of its instance: we could probably thread things through
properly with the Verilator environment, but it just ain't gonna
happen with other simulators, that don't have a C++ toplevel.
This patch then changes the ISS to spit out responses that look more
like the RTL when it's running in "stepped" mode: the idea is that we
can compare them with just string comparisons.
Finally, there's a certain amount of logic to handle things like stall
cycles cleanly.
Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
diff --git a/hw/ip/otbn/dv/uvm/tb.sv b/hw/ip/otbn/dv/uvm/tb.sv
index 578862f..b9324fb 100644
--- a/hw/ip/otbn/dv/uvm/tb.sv
+++ b/hw/ip/otbn/dv/uvm/tb.sv
@@ -53,6 +53,13 @@
);
+ bind otbn_core otbn_trace_if #(
+ .ImemAddrWidth (ImemAddrWidth),
+ .DmemAddrWidth (DmemAddrWidth)
+ ) i_otbn_trace_if (.*);
+
+ bind otbn_core otbn_tracer u_otbn_tracer(.*, .otbn_trace(i_otbn_trace_if));
+
// OTBN model, wrapping an ISS.
//
// Note that we pull the "start" signal out of the DUT. This is because it's much more difficult
