blob: 45de2f2ae86c1625599651bad67e05f3537a8505 [file] [log] [blame]
Eunchan Kim06550352020-10-12 16:42:45 -07001# Copyright lowRISC contributors.
2# Licensed under the Apache License, Version 2.0, see LICENSE for details.
3# SPDX-License-Identifier: Apache-2.0
4#
5# Rules for svlint, a SystemVerilog linter commonly used in editors.
6# The configuration matches the lowRISC SystemVerilog style guide at
7# https://github.com/lowRISC/style-guides/blob/master/VerilogCodingStyle.md.
8# See https://github.com/dalance/svlint/blob/master/RULES.md for a list of rules.
9
10[option]
11exclude_paths = ["build.*", "sw/.*", ".sv.tpl$"]
12
13[rules]
14case_default = true
15enum_with_type = true
16for_with_begin = true
17function_same_as_system_function = true
18function_with_automatic = true
19generate_for_with_label = true
20generate_if_with_label = true
21generate_keyword_forbidden = true
22generate_keyword_required = false
23genvar_declaration_in_loop = true
24genvar_declaration_out_loop = false
25if_with_begin = true
26inout_with_tri = false
27input_with_var = false
28interface_port_with_modport = false
29legacy_always = false
30level_sensitive_always = true
31loop_variable_declaration = true
32non_ansi_module = true
33output_with_var = false
34parameter_in_package = false
35priority_keyword = true
36tab_character = true
37unique0_keyword = false
38unique_keyword = false
39wire_reg = true
40generate_keyword = false
41tab_charactor = false
42genvar_declaration = false