| commit | b118f54e3171aea7d7bf6fd0ab00914bdfc4cc2f | [log] [tgz] |
|---|---|---|
| author | Eunchan Kim <eunchan@opentitan.org> | Tue Feb 02 09:57:07 2021 -0800 |
| committer | Eunchan Kim <eunchan@opentitan.org> | Tue Feb 09 09:17:25 2021 -0800 |
| tree | a2293f4ac5e71ae6f9822e07afa90cfae02c0d39 | |
| parent | e8252d4c29d025c26694e44c11b9a8fa464c55b2 [diff] |
[spi_device] Increase SRAM to 1024 depth SPI Flash device requires bigger DPSRAM for another set of commands such as SFDP. And also command/address/payload fifo for SW to process PROGRAM comamnd and other commands (than Read). The suggested space is 4kB. Its space is used as below in newly introduce modes: 1. Read content: 2kB 2. Mailbox content: 1kB 3. SFDP content: 256B 4. Payload content: 256B 5. Command FIFO: 64B (only lower one byte valid) 6. Address FIFO: 64B (lower 3B valid in 3B addr mode) Signed-off-by: Eunchan Kim <eunchan@opentitan.org>
OpenTitan is an open source silicon Root of Trust (RoT) project. OpenTitan will make the silicon RoT design and implementation more transparent, trustworthy, and secure for enterprises, platform providers, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative project to produce high quality, open IP for instantiation as a full-featured product. See the OpenTitan site and OpenTitan docs for more information about the project.
This repository contains hardware, software and utilities written as part of the OpenTitan project. It is structured as monolithic repository, or “monorepo”, where all components live in one repository. It exists to enable collaboration across partners participating in the OpenTitan project.
The project contains comprehensive documentation of all IPs and tools. You can access it online at docs.opentitan.org.
Have a look at CONTRIBUTING for guidelines on how to contribute code to this repository.
Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).