blob: 696b25f717c612313073eff1b37d0d32d17f63b4 [file] [log] [blame] [view]
Sam Elliotta9391812020-06-05 11:21:15 +01001---
2title: "PLIC DIF Checklist"
3---
4
5This checklist is for [Development Stage]({{< relref "/doc/project/development_stages.md" >}}) transitions for the [PLIC DIF]({{< relref "hw/ip/rv_plic/doc" >}}).
6All checklist items refer to the content in the [Checklist]({{< relref "/doc/project/checklist.md" >}}).
7
Michael Schaffner945bbef2020-10-09 19:20:39 -07008## DIF Checklist
Sam Elliotta9391812020-06-05 11:21:15 +01009
Michael Schaffner945bbef2020-10-09 19:20:39 -070010### S1
Sam Elliotta9391812020-06-05 11:21:15 +010011
12Type | Item | Resolution | Note/Collaterals
13---------------|----------------------|-------------|------------------
Garret Kelly0790f1b2020-06-08 11:39:33 -040014Implementation | [DIF_EXISTS][] | Done |
15Implementation | [DIF_USED_IN_TREE][] | Done |
16Tests | [DIF_TEST_UNIT][] | Done |
Sam Elliottf8456182020-11-19 12:21:30 +000017Tests | [DIF_TEST_SMOKE][] | Done |
Sam Elliotta9391812020-06-05 11:21:15 +010018
Michael Schaffner945bbef2020-10-09 19:20:39 -070019[DIF_EXISTS]: {{< relref "/doc/project/checklist.md#dif_exists" >}}
20[DIF_USED_IN_TREE]: {{< relref "/doc/project/checklist.md#dif_used_in_tree" >}}
21[DIF_TEST_UNIT]: {{< relref "/doc/project/checklist.md#dif_test_unit" >}}
Sam Elliottf8456182020-11-19 12:21:30 +000022[DIF_TEST_SMOKE]: {{< relref "/doc/project/checklist.md#dif_test_smoke" >}}
Sam Elliotta9391812020-06-05 11:21:15 +010023
Michael Schaffner945bbef2020-10-09 19:20:39 -070024### S2
Sam Elliotta9391812020-06-05 11:21:15 +010025
26Type | Item | Resolution | Note/Collaterals
27---------------|-----------------------------|-------------|------------------
28Implementation | [DIF_FEATURES][] | Not Started |
Sam Elliott877b4f62020-09-22 17:41:21 +010029Coordination | [DIF_HW_USAGE_REVIEWED][] | Done |
Sam Elliott81439a82020-07-23 12:37:55 +010030Coordination | [DIF_HW_FEATURE_COMPLETE][] | Not Started | [HW Dashboard]({{< relref "hw" >}})
Sam Elliotta9391812020-06-05 11:21:15 +010031Implementation | [DIF_HW_PARAMS][] | Not Started |
32Documentation | [DIF_DOC_HW][] | Not Started |
33Documentation | [DIF_DOC_API][] | Not Started |
34Code Quality | [DIF_CODE_STYLE][] | Not Started |
35Coordination | [DIF_DV_TESTS][] | Not Started |
36Implementation | [DIF_USED_TOCK][] | Not Started |
Sam Elliott877b4f62020-09-22 17:41:21 +010037Review | HW IP Usage Reviewer(s) | Not Started | @eunchan
Sam Elliotta9391812020-06-05 11:21:15 +010038
Michael Schaffner945bbef2020-10-09 19:20:39 -070039[DIF_FEATURES]: {{< relref "/doc/project/checklist.md#dif_features" >}}
40[DIF_HW_USAGE_REVIEWED]: {{< relref "/doc/project/checklist.md#dif_hw_usage_reviewed" >}}
41[DIF_HW_FEATURE_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_hw_feature_complete" >}}
42[DIF_HW_PARAMS]: {{< relref "/doc/project/checklist.md#dif_hw_params" >}}
43[DIF_DOC_HW]: {{< relref "/doc/project/checklist.md#dif_doc_hw" >}}
44[DIF_DOC_API]: {{< relref "/doc/project/checklist.md#dif_doc_api" >}}
45[DIF_CODE_STYLE]: {{< relref "/doc/project/checklist.md#dif_code_style" >}}
46[DIF_DV_TESTS]: {{< relref "/doc/project/checklist.md#dif_dv_tests" >}}
47[DIF_USED_TOCK]: {{< relref "/doc/project/checklist.md#dif_used_tock" >}}
Sam Elliotta9391812020-06-05 11:21:15 +010048
Michael Schaffner945bbef2020-10-09 19:20:39 -070049### S3
Sam Elliotta9391812020-06-05 11:21:15 +010050
51Type | Item | Resolution | Note/Collaterals
52---------------|----------------------------------|-------------|------------------
53Coordination | [DIF_HW_DESIGN_COMPLETE][] | Not Started |
54Coordination | [DIF_HW_VERIFICATION_COMPLETE][] | Not Started |
55Review | [DIF_REVIEW_C_STABLE][] | Not Started |
56Tests | [DIF_TEST_UNIT_COMPLETE][] | Not Started |
57Review | [DIF_TODO_COMPLETE][] | Not Started |
58Review | [DIF_REVIEW_TOCK_STABLE][] | Not Started |
59Review | Reviewer(s) | Not Started |
60Review | Signoff date | Not Started |
61
Michael Schaffner945bbef2020-10-09 19:20:39 -070062[DIF_HW_DESIGN_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_hw_design_complete" >}}
63[DIF_HW_VERIFICATION_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_hw_verification_complete" >}}
64[DIF_REVIEW_C_STABLE]: {{< relref "/doc/project/checklist.md#dif_review_c_stable" >}}
65[DIF_TEST_UNIT_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_test_unit_complete" >}}
66[DIF_TODO_COMPLETE]: {{< relref "/doc/project/checklist.md#dif_todo_complete" >}}
67[DIF_REVIEW_TOCK_STABLE]: {{< relref "/doc/project/checklist.md#dif_review_tock_stable" >}}