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Timothy Chen15adeee2020-09-09 15:44:35 -07001// Copyright lowRISC contributors.
2// Licensed under the Apache License, Version 2.0, see LICENSE for details.
3// SPDX-License-Identifier: Apache-2.0
4//
5// Register Package auto-generated by `reggen` containing data structure
6
7package keymgr_reg_pkg;
8
9 // Param list
Timothy Chena4e2d7f2021-03-11 22:34:21 -080010 parameter int NumSaltReg = 8;
11 parameter int NumSwBindingReg = 8;
Timothy Chen15adeee2020-09-09 15:44:35 -070012 parameter int NumOutReg = 8;
13 parameter int NumKeyVersion = 1;
Timothy Chen1d05bd62020-10-07 18:42:07 -070014 parameter int NumAlerts = 2;
Timothy Chen15adeee2020-09-09 15:44:35 -070015
Rupert Swarbrick200d8b42021-03-08 12:32:11 +000016 // Address widths within the block
Rupert Swarbricke7068ec2021-01-20 08:42:54 +000017 parameter int BlockAw = 8;
18
Timothy Chen15adeee2020-09-09 15:44:35 -070019 ////////////////////////////
20 // Typedefs for registers //
21 ////////////////////////////
Rupert Swarbrick200d8b42021-03-08 12:32:11 +000022
Timothy Chen15adeee2020-09-09 15:44:35 -070023 typedef struct packed {
Timothy Chen51c85462020-12-10 16:36:02 -080024 logic q;
Timothy Chen15adeee2020-09-09 15:44:35 -070025 } keymgr_reg2hw_intr_state_reg_t;
26
27 typedef struct packed {
Timothy Chen51c85462020-12-10 16:36:02 -080028 logic q;
Timothy Chen15adeee2020-09-09 15:44:35 -070029 } keymgr_reg2hw_intr_enable_reg_t;
30
31 typedef struct packed {
Timothy Chen51c85462020-12-10 16:36:02 -080032 logic q;
33 logic qe;
Timothy Chen15adeee2020-09-09 15:44:35 -070034 } keymgr_reg2hw_intr_test_reg_t;
35
36 typedef struct packed {
Timothy Chen5e93b272020-10-27 14:16:33 -070037 struct packed {
38 logic q;
39 logic qe;
Michael Schaffner4908b1b2021-02-02 13:26:17 -080040 } fatal_fault_err;
Timothy Chen5e93b272020-10-27 14:16:33 -070041 struct packed {
42 logic q;
43 logic qe;
Michael Schaffner4908b1b2021-02-02 13:26:17 -080044 } recov_operation_err;
Michael Schaffner8da11972020-10-26 19:51:39 -070045 } keymgr_reg2hw_alert_test_reg_t;
46
47 typedef struct packed {
Timothy Chen15adeee2020-09-09 15:44:35 -070048 struct packed {
49 logic q;
Timothy Chen15adeee2020-09-09 15:44:35 -070050 } start;
51 struct packed {
52 logic [2:0] q;
53 } operation;
54 struct packed {
Timothy Chen1a162112021-06-30 18:35:59 -070055 logic q;
56 } cdi_sel;
57 struct packed {
Timothy Chen70151fe2021-07-08 12:59:21 -070058 logic [2:0] q;
Timothy Chen15adeee2020-09-09 15:44:35 -070059 } dest_sel;
60 } keymgr_reg2hw_control_reg_t;
61
62 typedef struct packed {
Timothy Chen80fb8f42021-08-02 14:36:28 -070063 logic [2:0] q;
Timothy Chen51c85462020-12-10 16:36:02 -080064 } keymgr_reg2hw_sideload_clear_reg_t;
65
66 typedef struct packed {
Timothy Chend5820b02020-12-05 17:19:06 -080067 logic [15:0] q;
Timothy Chen1e9c7002021-08-02 19:17:05 -070068 logic err_update;
69 logic err_storage;
70 } keymgr_reg2hw_reseed_interval_shadowed_reg_t;
Timothy Chend5820b02020-12-05 17:19:06 -080071
72 typedef struct packed {
Timothy Chen73f9fb02021-01-06 13:27:41 -080073 logic q;
74 logic qe;
Michael Schaffneref348c92021-02-09 14:55:17 -080075 } keymgr_reg2hw_sw_binding_regwen_reg_t;
Timothy Chen73f9fb02021-01-06 13:27:41 -080076
77 typedef struct packed {
Timothy Chen15adeee2020-09-09 15:44:35 -070078 logic [31:0] q;
Timothy Chen1a162112021-06-30 18:35:59 -070079 } keymgr_reg2hw_sealing_sw_binding_mreg_t;
80
81 typedef struct packed {
82 logic [31:0] q;
83 } keymgr_reg2hw_attest_sw_binding_mreg_t;
Timothy Chen15adeee2020-09-09 15:44:35 -070084
85 typedef struct packed {
86 logic [31:0] q;
87 } keymgr_reg2hw_salt_mreg_t;
88
89 typedef struct packed {
90 logic [31:0] q;
91 } keymgr_reg2hw_key_version_mreg_t;
92
93 typedef struct packed {
94 logic [31:0] q;
Timothy Chen1e9c7002021-08-02 19:17:05 -070095 logic err_update;
96 logic err_storage;
97 } keymgr_reg2hw_max_creator_key_ver_shadowed_reg_t;
Timothy Chen15adeee2020-09-09 15:44:35 -070098
99 typedef struct packed {
100 logic [31:0] q;
Timothy Chen1e9c7002021-08-02 19:17:05 -0700101 logic err_update;
102 logic err_storage;
103 } keymgr_reg2hw_max_owner_int_key_ver_shadowed_reg_t;
Timothy Chen15adeee2020-09-09 15:44:35 -0700104
105 typedef struct packed {
106 logic [31:0] q;
Timothy Chen1e9c7002021-08-02 19:17:05 -0700107 logic err_update;
108 logic err_storage;
109 } keymgr_reg2hw_max_owner_key_ver_shadowed_reg_t;
Timothy Chen15adeee2020-09-09 15:44:35 -0700110
111 typedef struct packed {
112 struct packed {
113 logic q;
Timothy Chen8e374342021-08-25 20:55:31 -0700114 } cmd;
115 struct packed {
116 logic q;
117 } kmac_fsm;
118 struct packed {
119 logic q;
120 } kmac_op;
121 struct packed {
122 logic q;
123 } kmac_out;
124 struct packed {
125 logic q;
126 } regfile_intg;
127 struct packed {
128 logic q;
129 } shadow;
130 struct packed {
131 logic q;
132 } ctrl_fsm_intg;
133 struct packed {
134 logic q;
135 } ctrl_fsm_cnt;
136 } keymgr_reg2hw_fault_status_reg_t;
137
138 typedef struct packed {
Timothy Chen51c85462020-12-10 16:36:02 -0800139 logic d;
140 logic de;
Timothy Chen15adeee2020-09-09 15:44:35 -0700141 } keymgr_hw2reg_intr_state_reg_t;
142
143 typedef struct packed {
144 logic d;
Michael Schaffneref348c92021-02-09 14:55:17 -0800145 } keymgr_hw2reg_cfg_regwen_reg_t;
Timothy Chen15adeee2020-09-09 15:44:35 -0700146
147 typedef struct packed {
148 struct packed {
149 logic d;
150 logic de;
Timothy Chen15adeee2020-09-09 15:44:35 -0700151 } start;
152 } keymgr_hw2reg_control_reg_t;
153
154 typedef struct packed {
Timothy Chen12ca8622020-12-08 12:29:44 -0800155 logic d;
Michael Schaffneref348c92021-02-09 14:55:17 -0800156 } keymgr_hw2reg_sw_binding_regwen_reg_t;
Timothy Chen12ca8622020-12-08 12:29:44 -0800157
158 typedef struct packed {
Timothy Chen15adeee2020-09-09 15:44:35 -0700159 logic [31:0] d;
160 logic de;
161 } keymgr_hw2reg_sw_share0_output_mreg_t;
162
163 typedef struct packed {
164 logic [31:0] d;
165 logic de;
166 } keymgr_hw2reg_sw_share1_output_mreg_t;
167
168 typedef struct packed {
Timothy Chen9e365452020-12-07 19:04:00 -0800169 logic [2:0] d;
Timothy Chen15adeee2020-09-09 15:44:35 -0700170 logic de;
171 } keymgr_hw2reg_working_state_reg_t;
172
173 typedef struct packed {
174 logic [1:0] d;
175 logic de;
176 } keymgr_hw2reg_op_status_reg_t;
177
178 typedef struct packed {
179 struct packed {
180 logic d;
181 logic de;
182 } invalid_op;
183 struct packed {
184 logic d;
185 logic de;
Timothy Chen15adeee2020-09-09 15:44:35 -0700186 } invalid_kmac_input;
187 struct packed {
188 logic d;
189 logic de;
Timothy Chen4fb25fc2021-08-19 18:15:08 -0700190 } invalid_shadow_update;
Timothy Chen15adeee2020-09-09 15:44:35 -0700191 } keymgr_hw2reg_err_code_reg_t;
192
Timothy Chen80fb8f42021-08-02 14:36:28 -0700193 typedef struct packed {
194 struct packed {
195 logic d;
196 logic de;
197 } cmd;
198 struct packed {
199 logic d;
200 logic de;
201 } kmac_fsm;
202 struct packed {
203 logic d;
204 logic de;
205 } kmac_op;
206 struct packed {
207 logic d;
208 logic de;
Timothy Chen4fb25fc2021-08-19 18:15:08 -0700209 } kmac_out;
210 struct packed {
211 logic d;
212 logic de;
Timothy Chen80fb8f42021-08-02 14:36:28 -0700213 } regfile_intg;
214 struct packed {
215 logic d;
216 logic de;
Timothy Chen1e9c7002021-08-02 19:17:05 -0700217 } shadow;
218 struct packed {
219 logic d;
220 logic de;
Timothy Chen80fb8f42021-08-02 14:36:28 -0700221 } ctrl_fsm_intg;
Timothy Cheneb7bf612021-08-03 16:17:09 -0700222 struct packed {
223 logic d;
224 logic de;
225 } ctrl_fsm_cnt;
Timothy Chen80fb8f42021-08-02 14:36:28 -0700226 } keymgr_hw2reg_fault_status_reg_t;
227
Rupert Swarbrick200d8b42021-03-08 12:32:11 +0000228 // Register -> HW type
Timothy Chen15adeee2020-09-09 15:44:35 -0700229 typedef struct packed {
Timothy Chen28bbd322021-09-01 00:06:10 -0700230 keymgr_reg2hw_intr_state_reg_t intr_state; // [940:940]
231 keymgr_reg2hw_intr_enable_reg_t intr_enable; // [939:939]
232 keymgr_reg2hw_intr_test_reg_t intr_test; // [938:937]
233 keymgr_reg2hw_alert_test_reg_t alert_test; // [936:933]
234 keymgr_reg2hw_control_reg_t control; // [932:925]
235 keymgr_reg2hw_sideload_clear_reg_t sideload_clear; // [924:922]
236 keymgr_reg2hw_reseed_interval_shadowed_reg_t reseed_interval_shadowed; // [921:906]
237 keymgr_reg2hw_sw_binding_regwen_reg_t sw_binding_regwen; // [905:904]
238 keymgr_reg2hw_sealing_sw_binding_mreg_t [7:0] sealing_sw_binding; // [903:648]
239 keymgr_reg2hw_attest_sw_binding_mreg_t [7:0] attest_sw_binding; // [647:392]
240 keymgr_reg2hw_salt_mreg_t [7:0] salt; // [391:136]
241 keymgr_reg2hw_key_version_mreg_t [0:0] key_version; // [135:104]
242 keymgr_reg2hw_max_creator_key_ver_shadowed_reg_t max_creator_key_ver_shadowed; // [103:72]
243 keymgr_reg2hw_max_owner_int_key_ver_shadowed_reg_t max_owner_int_key_ver_shadowed; // [71:40]
244 keymgr_reg2hw_max_owner_key_ver_shadowed_reg_t max_owner_key_ver_shadowed; // [39:8]
Timothy Chen8e374342021-08-25 20:55:31 -0700245 keymgr_reg2hw_fault_status_reg_t fault_status; // [7:0]
Timothy Chen15adeee2020-09-09 15:44:35 -0700246 } keymgr_reg2hw_t;
247
Rupert Swarbrick200d8b42021-03-08 12:32:11 +0000248 // HW -> register type
Timothy Chen15adeee2020-09-09 15:44:35 -0700249 typedef struct packed {
Timothy Chen28bbd322021-09-01 00:06:10 -0700250 keymgr_hw2reg_intr_state_reg_t intr_state; // [562:561]
251 keymgr_hw2reg_cfg_regwen_reg_t cfg_regwen; // [560:560]
252 keymgr_hw2reg_control_reg_t control; // [559:558]
253 keymgr_hw2reg_sw_binding_regwen_reg_t sw_binding_regwen; // [557:557]
254 keymgr_hw2reg_sw_share0_output_mreg_t [7:0] sw_share0_output; // [556:293]
255 keymgr_hw2reg_sw_share1_output_mreg_t [7:0] sw_share1_output; // [292:29]
256 keymgr_hw2reg_working_state_reg_t working_state; // [28:25]
257 keymgr_hw2reg_op_status_reg_t op_status; // [24:22]
258 keymgr_hw2reg_err_code_reg_t err_code; // [21:16]
Timothy Chen4fb25fc2021-08-19 18:15:08 -0700259 keymgr_hw2reg_fault_status_reg_t fault_status; // [15:0]
Timothy Chen15adeee2020-09-09 15:44:35 -0700260 } keymgr_hw2reg_t;
261
Rupert Swarbrick200d8b42021-03-08 12:32:11 +0000262 // Register offsets
Rupert Swarbricke7068ec2021-01-20 08:42:54 +0000263 parameter logic [BlockAw-1:0] KEYMGR_INTR_STATE_OFFSET = 8'h 0;
264 parameter logic [BlockAw-1:0] KEYMGR_INTR_ENABLE_OFFSET = 8'h 4;
265 parameter logic [BlockAw-1:0] KEYMGR_INTR_TEST_OFFSET = 8'h 8;
266 parameter logic [BlockAw-1:0] KEYMGR_ALERT_TEST_OFFSET = 8'h c;
Michael Schaffneref348c92021-02-09 14:55:17 -0800267 parameter logic [BlockAw-1:0] KEYMGR_CFG_REGWEN_OFFSET = 8'h 10;
Rupert Swarbricke7068ec2021-01-20 08:42:54 +0000268 parameter logic [BlockAw-1:0] KEYMGR_CONTROL_OFFSET = 8'h 14;
269 parameter logic [BlockAw-1:0] KEYMGR_SIDELOAD_CLEAR_OFFSET = 8'h 18;
Timothy Chen1e9c7002021-08-02 19:17:05 -0700270 parameter logic [BlockAw-1:0] KEYMGR_RESEED_INTERVAL_SHADOWED_OFFSET = 8'h 1c;
Michael Schaffneref348c92021-02-09 14:55:17 -0800271 parameter logic [BlockAw-1:0] KEYMGR_SW_BINDING_REGWEN_OFFSET = 8'h 20;
Timothy Chen1a162112021-06-30 18:35:59 -0700272 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_0_OFFSET = 8'h 24;
273 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_1_OFFSET = 8'h 28;
274 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_2_OFFSET = 8'h 2c;
275 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_3_OFFSET = 8'h 30;
276 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_4_OFFSET = 8'h 34;
277 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_5_OFFSET = 8'h 38;
278 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_6_OFFSET = 8'h 3c;
279 parameter logic [BlockAw-1:0] KEYMGR_SEALING_SW_BINDING_7_OFFSET = 8'h 40;
280 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_0_OFFSET = 8'h 44;
281 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_1_OFFSET = 8'h 48;
282 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_2_OFFSET = 8'h 4c;
283 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_3_OFFSET = 8'h 50;
284 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_4_OFFSET = 8'h 54;
285 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_5_OFFSET = 8'h 58;
286 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_6_OFFSET = 8'h 5c;
287 parameter logic [BlockAw-1:0] KEYMGR_ATTEST_SW_BINDING_7_OFFSET = 8'h 60;
288 parameter logic [BlockAw-1:0] KEYMGR_SALT_0_OFFSET = 8'h 64;
289 parameter logic [BlockAw-1:0] KEYMGR_SALT_1_OFFSET = 8'h 68;
290 parameter logic [BlockAw-1:0] KEYMGR_SALT_2_OFFSET = 8'h 6c;
291 parameter logic [BlockAw-1:0] KEYMGR_SALT_3_OFFSET = 8'h 70;
292 parameter logic [BlockAw-1:0] KEYMGR_SALT_4_OFFSET = 8'h 74;
293 parameter logic [BlockAw-1:0] KEYMGR_SALT_5_OFFSET = 8'h 78;
294 parameter logic [BlockAw-1:0] KEYMGR_SALT_6_OFFSET = 8'h 7c;
295 parameter logic [BlockAw-1:0] KEYMGR_SALT_7_OFFSET = 8'h 80;
296 parameter logic [BlockAw-1:0] KEYMGR_KEY_VERSION_OFFSET = 8'h 84;
297 parameter logic [BlockAw-1:0] KEYMGR_MAX_CREATOR_KEY_VER_REGWEN_OFFSET = 8'h 88;
Timothy Chen1e9c7002021-08-02 19:17:05 -0700298 parameter logic [BlockAw-1:0] KEYMGR_MAX_CREATOR_KEY_VER_SHADOWED_OFFSET = 8'h 8c;
Timothy Chen1a162112021-06-30 18:35:59 -0700299 parameter logic [BlockAw-1:0] KEYMGR_MAX_OWNER_INT_KEY_VER_REGWEN_OFFSET = 8'h 90;
Timothy Chen1e9c7002021-08-02 19:17:05 -0700300 parameter logic [BlockAw-1:0] KEYMGR_MAX_OWNER_INT_KEY_VER_SHADOWED_OFFSET = 8'h 94;
Timothy Chen1a162112021-06-30 18:35:59 -0700301 parameter logic [BlockAw-1:0] KEYMGR_MAX_OWNER_KEY_VER_REGWEN_OFFSET = 8'h 98;
Timothy Chen1e9c7002021-08-02 19:17:05 -0700302 parameter logic [BlockAw-1:0] KEYMGR_MAX_OWNER_KEY_VER_SHADOWED_OFFSET = 8'h 9c;
Timothy Chen1a162112021-06-30 18:35:59 -0700303 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_0_OFFSET = 8'h a0;
304 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_1_OFFSET = 8'h a4;
305 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_2_OFFSET = 8'h a8;
306 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_3_OFFSET = 8'h ac;
307 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_4_OFFSET = 8'h b0;
308 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_5_OFFSET = 8'h b4;
309 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_6_OFFSET = 8'h b8;
310 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE0_OUTPUT_7_OFFSET = 8'h bc;
311 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_0_OFFSET = 8'h c0;
312 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_1_OFFSET = 8'h c4;
313 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_2_OFFSET = 8'h c8;
314 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_3_OFFSET = 8'h cc;
315 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_4_OFFSET = 8'h d0;
316 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_5_OFFSET = 8'h d4;
317 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_6_OFFSET = 8'h d8;
318 parameter logic [BlockAw-1:0] KEYMGR_SW_SHARE1_OUTPUT_7_OFFSET = 8'h dc;
319 parameter logic [BlockAw-1:0] KEYMGR_WORKING_STATE_OFFSET = 8'h e0;
320 parameter logic [BlockAw-1:0] KEYMGR_OP_STATUS_OFFSET = 8'h e4;
321 parameter logic [BlockAw-1:0] KEYMGR_ERR_CODE_OFFSET = 8'h e8;
Timothy Chen80fb8f42021-08-02 14:36:28 -0700322 parameter logic [BlockAw-1:0] KEYMGR_FAULT_STATUS_OFFSET = 8'h ec;
Timothy Chen15adeee2020-09-09 15:44:35 -0700323
Rupert Swarbrick66e40932021-02-16 13:11:27 +0000324 // Reset values for hwext registers and their fields
Rupert Swarbrickc5841b72021-02-15 08:25:02 +0000325 parameter logic [0:0] KEYMGR_INTR_TEST_RESVAL = 1'h 0;
Rupert Swarbrick66e40932021-02-16 13:11:27 +0000326 parameter logic [0:0] KEYMGR_INTR_TEST_OP_DONE_RESVAL = 1'h 0;
Rupert Swarbrickc5841b72021-02-15 08:25:02 +0000327 parameter logic [1:0] KEYMGR_ALERT_TEST_RESVAL = 2'h 0;
Rupert Swarbrick66e40932021-02-16 13:11:27 +0000328 parameter logic [0:0] KEYMGR_ALERT_TEST_FATAL_FAULT_ERR_RESVAL = 1'h 0;
329 parameter logic [0:0] KEYMGR_ALERT_TEST_RECOV_OPERATION_ERR_RESVAL = 1'h 0;
Rupert Swarbrickc5841b72021-02-15 08:25:02 +0000330 parameter logic [0:0] KEYMGR_CFG_REGWEN_RESVAL = 1'h 1;
Rupert Swarbrick66e40932021-02-16 13:11:27 +0000331 parameter logic [0:0] KEYMGR_CFG_REGWEN_EN_RESVAL = 1'h 1;
Rupert Swarbrickc5841b72021-02-15 08:25:02 +0000332 parameter logic [0:0] KEYMGR_SW_BINDING_REGWEN_RESVAL = 1'h 1;
Rupert Swarbrick66e40932021-02-16 13:11:27 +0000333 parameter logic [0:0] KEYMGR_SW_BINDING_REGWEN_EN_RESVAL = 1'h 1;
Timothy Chen15adeee2020-09-09 15:44:35 -0700334
Rupert Swarbrick200d8b42021-03-08 12:32:11 +0000335 // Register index
Timothy Chen15adeee2020-09-09 15:44:35 -0700336 typedef enum int {
337 KEYMGR_INTR_STATE,
338 KEYMGR_INTR_ENABLE,
339 KEYMGR_INTR_TEST,
Michael Schaffner8da11972020-10-26 19:51:39 -0700340 KEYMGR_ALERT_TEST,
Michael Schaffneref348c92021-02-09 14:55:17 -0800341 KEYMGR_CFG_REGWEN,
Timothy Chen15adeee2020-09-09 15:44:35 -0700342 KEYMGR_CONTROL,
Timothy Chen51c85462020-12-10 16:36:02 -0800343 KEYMGR_SIDELOAD_CLEAR,
Timothy Chen1e9c7002021-08-02 19:17:05 -0700344 KEYMGR_RESEED_INTERVAL_SHADOWED,
Michael Schaffneref348c92021-02-09 14:55:17 -0800345 KEYMGR_SW_BINDING_REGWEN,
Timothy Chen1a162112021-06-30 18:35:59 -0700346 KEYMGR_SEALING_SW_BINDING_0,
347 KEYMGR_SEALING_SW_BINDING_1,
348 KEYMGR_SEALING_SW_BINDING_2,
349 KEYMGR_SEALING_SW_BINDING_3,
350 KEYMGR_SEALING_SW_BINDING_4,
351 KEYMGR_SEALING_SW_BINDING_5,
352 KEYMGR_SEALING_SW_BINDING_6,
353 KEYMGR_SEALING_SW_BINDING_7,
354 KEYMGR_ATTEST_SW_BINDING_0,
355 KEYMGR_ATTEST_SW_BINDING_1,
356 KEYMGR_ATTEST_SW_BINDING_2,
357 KEYMGR_ATTEST_SW_BINDING_3,
358 KEYMGR_ATTEST_SW_BINDING_4,
359 KEYMGR_ATTEST_SW_BINDING_5,
360 KEYMGR_ATTEST_SW_BINDING_6,
361 KEYMGR_ATTEST_SW_BINDING_7,
Timothy Chen15adeee2020-09-09 15:44:35 -0700362 KEYMGR_SALT_0,
363 KEYMGR_SALT_1,
364 KEYMGR_SALT_2,
365 KEYMGR_SALT_3,
Timothy Chena4e2d7f2021-03-11 22:34:21 -0800366 KEYMGR_SALT_4,
367 KEYMGR_SALT_5,
368 KEYMGR_SALT_6,
369 KEYMGR_SALT_7,
Timothy Chen15adeee2020-09-09 15:44:35 -0700370 KEYMGR_KEY_VERSION,
Michael Schaffneref348c92021-02-09 14:55:17 -0800371 KEYMGR_MAX_CREATOR_KEY_VER_REGWEN,
Timothy Chen1e9c7002021-08-02 19:17:05 -0700372 KEYMGR_MAX_CREATOR_KEY_VER_SHADOWED,
Michael Schaffneref348c92021-02-09 14:55:17 -0800373 KEYMGR_MAX_OWNER_INT_KEY_VER_REGWEN,
Timothy Chen1e9c7002021-08-02 19:17:05 -0700374 KEYMGR_MAX_OWNER_INT_KEY_VER_SHADOWED,
Michael Schaffneref348c92021-02-09 14:55:17 -0800375 KEYMGR_MAX_OWNER_KEY_VER_REGWEN,
Timothy Chen1e9c7002021-08-02 19:17:05 -0700376 KEYMGR_MAX_OWNER_KEY_VER_SHADOWED,
Timothy Chen15adeee2020-09-09 15:44:35 -0700377 KEYMGR_SW_SHARE0_OUTPUT_0,
378 KEYMGR_SW_SHARE0_OUTPUT_1,
379 KEYMGR_SW_SHARE0_OUTPUT_2,
380 KEYMGR_SW_SHARE0_OUTPUT_3,
381 KEYMGR_SW_SHARE0_OUTPUT_4,
382 KEYMGR_SW_SHARE0_OUTPUT_5,
383 KEYMGR_SW_SHARE0_OUTPUT_6,
384 KEYMGR_SW_SHARE0_OUTPUT_7,
385 KEYMGR_SW_SHARE1_OUTPUT_0,
386 KEYMGR_SW_SHARE1_OUTPUT_1,
387 KEYMGR_SW_SHARE1_OUTPUT_2,
388 KEYMGR_SW_SHARE1_OUTPUT_3,
389 KEYMGR_SW_SHARE1_OUTPUT_4,
390 KEYMGR_SW_SHARE1_OUTPUT_5,
391 KEYMGR_SW_SHARE1_OUTPUT_6,
392 KEYMGR_SW_SHARE1_OUTPUT_7,
393 KEYMGR_WORKING_STATE,
394 KEYMGR_OP_STATUS,
Timothy Chen80fb8f42021-08-02 14:36:28 -0700395 KEYMGR_ERR_CODE,
396 KEYMGR_FAULT_STATUS
Timothy Chen15adeee2020-09-09 15:44:35 -0700397 } keymgr_id_e;
398
399 // Register width information to check illegal writes
Timothy Chen80fb8f42021-08-02 14:36:28 -0700400 parameter logic [3:0] KEYMGR_PERMIT [60] = '{
Timothy Chen15adeee2020-09-09 15:44:35 -0700401 4'b 0001, // index[ 0] KEYMGR_INTR_STATE
402 4'b 0001, // index[ 1] KEYMGR_INTR_ENABLE
403 4'b 0001, // index[ 2] KEYMGR_INTR_TEST
Michael Schaffner8da11972020-10-26 19:51:39 -0700404 4'b 0001, // index[ 3] KEYMGR_ALERT_TEST
Michael Schaffneref348c92021-02-09 14:55:17 -0800405 4'b 0001, // index[ 4] KEYMGR_CFG_REGWEN
Michael Schaffner8da11972020-10-26 19:51:39 -0700406 4'b 0011, // index[ 5] KEYMGR_CONTROL
Timothy Chen51c85462020-12-10 16:36:02 -0800407 4'b 0001, // index[ 6] KEYMGR_SIDELOAD_CLEAR
Timothy Chen1e9c7002021-08-02 19:17:05 -0700408 4'b 0011, // index[ 7] KEYMGR_RESEED_INTERVAL_SHADOWED
Michael Schaffneref348c92021-02-09 14:55:17 -0800409 4'b 0001, // index[ 8] KEYMGR_SW_BINDING_REGWEN
Timothy Chen1a162112021-06-30 18:35:59 -0700410 4'b 1111, // index[ 9] KEYMGR_SEALING_SW_BINDING_0
411 4'b 1111, // index[10] KEYMGR_SEALING_SW_BINDING_1
412 4'b 1111, // index[11] KEYMGR_SEALING_SW_BINDING_2
413 4'b 1111, // index[12] KEYMGR_SEALING_SW_BINDING_3
414 4'b 1111, // index[13] KEYMGR_SEALING_SW_BINDING_4
415 4'b 1111, // index[14] KEYMGR_SEALING_SW_BINDING_5
416 4'b 1111, // index[15] KEYMGR_SEALING_SW_BINDING_6
417 4'b 1111, // index[16] KEYMGR_SEALING_SW_BINDING_7
418 4'b 1111, // index[17] KEYMGR_ATTEST_SW_BINDING_0
419 4'b 1111, // index[18] KEYMGR_ATTEST_SW_BINDING_1
420 4'b 1111, // index[19] KEYMGR_ATTEST_SW_BINDING_2
421 4'b 1111, // index[20] KEYMGR_ATTEST_SW_BINDING_3
422 4'b 1111, // index[21] KEYMGR_ATTEST_SW_BINDING_4
423 4'b 1111, // index[22] KEYMGR_ATTEST_SW_BINDING_5
424 4'b 1111, // index[23] KEYMGR_ATTEST_SW_BINDING_6
425 4'b 1111, // index[24] KEYMGR_ATTEST_SW_BINDING_7
426 4'b 1111, // index[25] KEYMGR_SALT_0
427 4'b 1111, // index[26] KEYMGR_SALT_1
428 4'b 1111, // index[27] KEYMGR_SALT_2
429 4'b 1111, // index[28] KEYMGR_SALT_3
430 4'b 1111, // index[29] KEYMGR_SALT_4
431 4'b 1111, // index[30] KEYMGR_SALT_5
432 4'b 1111, // index[31] KEYMGR_SALT_6
433 4'b 1111, // index[32] KEYMGR_SALT_7
434 4'b 1111, // index[33] KEYMGR_KEY_VERSION
435 4'b 0001, // index[34] KEYMGR_MAX_CREATOR_KEY_VER_REGWEN
Timothy Chen1e9c7002021-08-02 19:17:05 -0700436 4'b 1111, // index[35] KEYMGR_MAX_CREATOR_KEY_VER_SHADOWED
Timothy Chen1a162112021-06-30 18:35:59 -0700437 4'b 0001, // index[36] KEYMGR_MAX_OWNER_INT_KEY_VER_REGWEN
Timothy Chen1e9c7002021-08-02 19:17:05 -0700438 4'b 1111, // index[37] KEYMGR_MAX_OWNER_INT_KEY_VER_SHADOWED
Timothy Chen1a162112021-06-30 18:35:59 -0700439 4'b 0001, // index[38] KEYMGR_MAX_OWNER_KEY_VER_REGWEN
Timothy Chen1e9c7002021-08-02 19:17:05 -0700440 4'b 1111, // index[39] KEYMGR_MAX_OWNER_KEY_VER_SHADOWED
Timothy Chen1a162112021-06-30 18:35:59 -0700441 4'b 1111, // index[40] KEYMGR_SW_SHARE0_OUTPUT_0
442 4'b 1111, // index[41] KEYMGR_SW_SHARE0_OUTPUT_1
443 4'b 1111, // index[42] KEYMGR_SW_SHARE0_OUTPUT_2
444 4'b 1111, // index[43] KEYMGR_SW_SHARE0_OUTPUT_3
445 4'b 1111, // index[44] KEYMGR_SW_SHARE0_OUTPUT_4
446 4'b 1111, // index[45] KEYMGR_SW_SHARE0_OUTPUT_5
447 4'b 1111, // index[46] KEYMGR_SW_SHARE0_OUTPUT_6
448 4'b 1111, // index[47] KEYMGR_SW_SHARE0_OUTPUT_7
449 4'b 1111, // index[48] KEYMGR_SW_SHARE1_OUTPUT_0
450 4'b 1111, // index[49] KEYMGR_SW_SHARE1_OUTPUT_1
451 4'b 1111, // index[50] KEYMGR_SW_SHARE1_OUTPUT_2
452 4'b 1111, // index[51] KEYMGR_SW_SHARE1_OUTPUT_3
453 4'b 1111, // index[52] KEYMGR_SW_SHARE1_OUTPUT_4
454 4'b 1111, // index[53] KEYMGR_SW_SHARE1_OUTPUT_5
455 4'b 1111, // index[54] KEYMGR_SW_SHARE1_OUTPUT_6
456 4'b 1111, // index[55] KEYMGR_SW_SHARE1_OUTPUT_7
457 4'b 0001, // index[56] KEYMGR_WORKING_STATE
458 4'b 0001, // index[57] KEYMGR_OP_STATUS
Timothy Chen80fb8f42021-08-02 14:36:28 -0700459 4'b 0001, // index[58] KEYMGR_ERR_CODE
460 4'b 0001 // index[59] KEYMGR_FAULT_STATUS
Timothy Chen15adeee2020-09-09 15:44:35 -0700461 };
Rupert Swarbrick200d8b42021-03-08 12:32:11 +0000462
Timothy Chen15adeee2020-09-09 15:44:35 -0700463endpackage
464