[topgen] Allow multiple device interfaces to connect to the crossbar
This looks like quite a big change, but lots of the changes are
auto-generated.
The main change to the data model is that an IpBlock can now contain
multiple RegBlock objects (one for each device interface). While we're
at it, we also remove the "Block" base class that nothing ever used:
we're Python, not Java: time to embrace sum types :-D
The other noticeable change is in how the xbar parsing logic works. If
you want multiple device interfaces for a block, you should create a
node for each in e.g. xbar_main.hjson. These should be named
"<inst_name>.<if_name>" for a named interface. Obviously, these nodes
also need adding to the connections list at the bottom.
There's a problem of aliasing, where the first register in each
interface will have address zero in <block>_ral_pkg.sv. For now, we're
"solving" this by adding the index of the device interface to the
address, shifted up by 28 bits. I'm not sure how best to do this at
the chip level, but it can probably be addressed in a follow-up.
The structure of most output files are unchanged. The only difference
is stuff that needs creating per device interface (such as the reg_top
modules and the FPV CSR files).
Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
diff --git a/hw/ip/keymgr/rtl/keymgr_reg_pkg.sv b/hw/ip/keymgr/rtl/keymgr_reg_pkg.sv
index f28a4bf..2146f9a 100644
--- a/hw/ip/keymgr/rtl/keymgr_reg_pkg.sv
+++ b/hw/ip/keymgr/rtl/keymgr_reg_pkg.sv
@@ -13,12 +13,13 @@
parameter int NumKeyVersion = 1;
parameter int NumAlerts = 2;
- // Address width within the block
+ // Address widths within the block
parameter int BlockAw = 8;
////////////////////////////
// Typedefs for registers //
////////////////////////////
+
typedef struct packed {
logic q;
} keymgr_reg2hw_intr_state_reg_t;
@@ -107,7 +108,6 @@
} invalid_kmac_data;
} keymgr_reg2hw_err_code_reg_t;
-
typedef struct packed {
logic d;
logic de;
@@ -167,10 +167,7 @@
} invalid_kmac_data;
} keymgr_hw2reg_err_code_reg_t;
-
- ///////////////////////////////////////
- // Register to internal design logic //
- ///////////////////////////////////////
+ // Register -> HW type
typedef struct packed {
keymgr_reg2hw_intr_state_reg_t intr_state; // [420:420]
keymgr_reg2hw_intr_enable_reg_t intr_enable; // [419:419]
@@ -189,9 +186,7 @@
keymgr_reg2hw_err_code_reg_t err_code; // [3:0]
} keymgr_reg2hw_t;
- ///////////////////////////////////////
- // Internal design logic to register //
- ///////////////////////////////////////
+ // HW -> register type
typedef struct packed {
keymgr_hw2reg_intr_state_reg_t intr_state; // [548:547]
keymgr_hw2reg_cfg_regwen_reg_t cfg_regwen; // [546:546]
@@ -204,7 +199,7 @@
keymgr_hw2reg_err_code_reg_t err_code; // [7:0]
} keymgr_hw2reg_t;
- // Register Address
+ // Register offsets
parameter logic [BlockAw-1:0] KEYMGR_INTR_STATE_OFFSET = 8'h 0;
parameter logic [BlockAw-1:0] KEYMGR_INTR_ENABLE_OFFSET = 8'h 4;
parameter logic [BlockAw-1:0] KEYMGR_INTR_TEST_OFFSET = 8'h 8;
@@ -260,7 +255,7 @@
parameter logic [0:0] KEYMGR_SW_BINDING_REGWEN_RESVAL = 1'h 1;
parameter logic [0:0] KEYMGR_SW_BINDING_REGWEN_EN_RESVAL = 1'h 1;
- // Register Index
+ // Register index
typedef enum int {
KEYMGR_INTR_STATE,
KEYMGR_INTR_ENABLE,
@@ -353,5 +348,6 @@
4'b 0001, // index[41] KEYMGR_OP_STATUS
4'b 0001 // index[42] KEYMGR_ERR_CODE
};
+
endpackage
