| { |
| name: "GP", |
| clock_primary: "clk_fixed", |
| bus_device: "tlul", |
| |
| regwidth: "32", |
| registers: [ |
| { name: "OE", |
| desc: '''GPIO Output Enable |
| |
| bit[i]=1'b0: Input mode for GPIO[i] |
| bit[i]=1'b1: Output mode for GPIO[i] |
| ''', |
| swaccess: "rw", |
| fields: [ |
| { bits: "31:0" } |
| ], |
| }, |
| { reserved: "4" } |
| { name: "DATA_IN", |
| desc: "GPIO Input data read bitfield", |
| swaccess: "ro", |
| fields: [ |
| { bits: "31:0", |
| resval: "x" |
| } |
| ], |
| }, |
| # multireg for single bit instance? |
| { multireg: { |
| name: "DATA_OUT", |
| desc: "GPIO output data", |
| count: "32", |
| cname: "GPIO", |
| swaccess: "rw", |
| fields: [ |
| { bits: "0", name: "D" desc: "Output data" } |
| ], |
| } |
| }, |
| |
| { multireg: { |
| name: "INT_CTRL", |
| desc: "GPIO Interrupt control", |
| count: "32", |
| cname: "GPIO", |
| swaccess: "rw", |
| fields: [ |
| { bits: "0", name: "POS", resval: "0", |
| desc: "Set to interrupt on rising edge" |
| } |
| { bits: "1", name: "NEG", resval: "0", |
| desc: "Set to interrupt on falling edge" |
| } |
| { bits: "4:2", name: "TYPE", resval: "0", |
| desc: "Type of interrupt to raise" |
| enum: [ |
| {value: "0", name: "none", desc: "log but no interrupt" }, |
| {value: "1", name: "low", desc: "low priotiry interrupt" }, |
| {value: "2", name: "high", desc: "high priotiry interrupt" }, |
| {value: "3", name: "nmi", desc: "non maskable interrupt" } |
| ] |
| } |
| ] |
| } |
| }, |
| { multireg: { |
| name: "WDATA", |
| desc: "Write with mask to GPIO out register", |
| count: "32", |
| cname: "GPIO", |
| swaccess: "rw", |
| fields: [ |
| { bits: "0", name: "DATA", resval: "0", |
| desc: "Data to write if mask bit is 1" |
| } |
| { bits: "16", name: "MASK", resval: "0", |
| desc: "Set to allow data write" |
| } |
| ] |
| } |
| } |
| ] |
| } |