[top] Various top level lint fixes Signed-off-by: Timothy Chen <timothytim@google.com>
diff --git a/hw/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver b/hw/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver index 8757e58..cd1cf28 100644 --- a/hw/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver +++ b/hw/ip/prim_generic/lint/prim_generic_pad_wrapper.waiver
@@ -19,4 +19,5 @@ -comment "This z assignment is correct." waive -rules PARAM_NOT_USED -regexp {Parameter 'Variant' not used in module 'prim_generic_pad_wrapper'} -location {prim_generic_pad_wrapper.sv} \ -comment "This parameter has been provisioned for later and is currently unused." - +waive -rules PARAM_NOT_USED -regexp {Parameter 'ScanRole' not used in module 'prim_generic_pad_wrapper'} -location {prim_generic_pad_wrapper.sv} \ + -comment "This parameter has been provisioned for later and is currently unused."
diff --git a/hw/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv b/hw/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv index 59a402d..53e3684 100644 --- a/hw/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv +++ b/hw/ip/prim_generic/rtl/prim_generic_pad_wrapper.sv
@@ -42,11 +42,11 @@ pok_i}; if (PadType == InputStd) begin : gen_input_only - logic unused_sigs; - assign unused_sigs = ^{out_i, - oe_i, - attr_i.virt_od_en, - attr_i.drive_strength}; + logic unused_in_sigs; + assign unused_in_sigs = ^{out_i, + oe_i, + attr_i.virt_od_en, + attr_i.drive_strength}; assign in_raw_o = (ie_i) ? inout_io : 1'bz; // input inversion @@ -84,8 +84,8 @@ `endif end else if (PadType == AnalogIn0) begin : gen_analog0 - logic unused_sigs; - assign unused_sigs = ^{attr_i, out_i, oe_i, ie_i}; + logic unused_ana_sigs; + assign unused_ana_sigs = ^{attr_i, out_i, oe_i, ie_i}; assign in_o = inout_io; assign in_raw_o = inout_io;
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv index 7d79a5b..c3a8cef 100644 --- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv +++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
@@ -254,7 +254,7 @@ .NDioPads(22), .NMioPads(47), .PhysicalPads(1), - .NIoBanks(IoBankCount), + .NIoBanks(int'(IoBankCount)), .DioScanRole ({ scan_role_pkg::DioPadIor9ScanRole, scan_role_pkg::DioPadIor8ScanRole, @@ -868,6 +868,10 @@ assign manual_out_cc2 = 1'b0; assign manual_oe_cc2 = 1'b0; + assign manual_out_flash_test_mode0 = 1'b0; + assign manual_oe_flash_test_mode0 = 1'b0; + assign manual_out_flash_test_mode1 = 1'b0; + assign manual_oe_flash_test_mode1 = 1'b0; assign manual_out_flash_test_volt = 1'b0; assign manual_oe_flash_test_volt = 1'b0; @@ -880,6 +884,8 @@ assign manual_attr_por_n = '0; assign manual_attr_cc1 = '0; assign manual_attr_cc2 = '0; + assign manual_attr_flash_test_mode0 = '0; + assign manual_attr_flash_test_mode1 = '0; assign manual_attr_flash_test_volt = '0; assign manual_attr_flash_test_mode0 = '0; assign manual_attr_flash_test_mode1 = '0; @@ -941,6 +947,8 @@ // Tie-off unused signals assign dio_in[DioUsbdevSense] = 1'b0; assign dio_in[DioUsbdevSe0] = 1'b0; + assign dio_in[DioUsbdevDpPullup] = 1'b0; + assign dio_in[DioUsbdevDnPullup] = 1'b0; assign dio_in[DioUsbdevTxModeSe] = 1'b0; assign dio_in[DioUsbdevSuspend] = 1'b0; @@ -993,9 +1001,8 @@ logic usb_ref_val; // adc - // The adc package definition should eventually be moved to the adc module - ast_pkg::adc_ast_req_t adc_i; - ast_pkg::adc_ast_rsp_t adc_o; + ast_pkg::adc_ast_req_t adc_req; + ast_pkg::adc_ast_rsp_t adc_rsp; // entropy source interface // The entropy source pacakge definition should eventually be moved to es @@ -1056,10 +1063,6 @@ import rstmgr_pkg::DomainAonSel; import rstmgr_pkg::Domain0Sel; - // adc connections - ast_pkg::adc_ast_req_t adc_req; - ast_pkg::adc_ast_rsp_t adc_rsp; - // external clock comes in at a fixed position logic ext_clk; assign ext_clk = mio_in_raw[MioPadIoc6];
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv index 50f4723..14c95c6 100644 --- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv +++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -2836,6 +2836,7 @@ // All dedicated inputs logic [22:0] unused_dio_p2d; + assign unused_dio_p2d = dio_p2d; assign cio_spi_host0_sd_p2d[0] = dio_p2d[DioSpiHost0Sd0]; assign cio_spi_host0_sd_p2d[1] = dio_p2d[DioSpiHost0Sd1]; assign cio_spi_host0_sd_p2d[2] = dio_p2d[DioSpiHost0Sd2]; @@ -2850,15 +2851,6 @@ assign cio_spi_device_sck_p2d = dio_p2d[DioSpiDeviceSck]; assign cio_spi_device_csb_p2d = dio_p2d[DioSpiDeviceCsb]; assign cio_usbdev_sense_p2d = dio_p2d[DioUsbdevSense]; - assign unused_dio_p2d[0] = dio_p2d[DioSpiHost0Sck]; - assign unused_dio_p2d[1] = dio_p2d[DioSpiHost0Csb]; - assign unused_dio_p2d[2] = dio_p2d[DioUsbdevSe0]; - assign unused_dio_p2d[3] = dio_p2d[DioUsbdevDpPullup]; - assign unused_dio_p2d[4] = dio_p2d[DioUsbdevDnPullup]; - assign unused_dio_p2d[5] = dio_p2d[DioUsbdevTxModeSe]; - assign unused_dio_p2d[6] = dio_p2d[DioUsbdevSuspend]; - assign unused_dio_p2d[7] = dio_p2d[DioSysrstCtrlAonEcRstOutL]; - assign unused_dio_p2d[8] = dio_p2d[DioSysrstCtrlAonPwrbOut]; // All dedicated outputs assign dio_d2p[DioSpiHost0Sd0] = cio_spi_host0_sd_d2p[0];
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv index bb85cee..4746c36 100644 --- a/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv +++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey_pkg.sv
@@ -463,7 +463,7 @@ // Enumeration of IO power domains. // Only used in ASIC target. - typedef enum { + typedef enum logic [2:0] { IoBankVcc = 0, IoBankAvcc = 1, IoBankVioa = 2,
diff --git a/hw/top_earlgrey/rtl/padring.sv b/hw/top_earlgrey/rtl/padring.sv index dae9e89..c05006a 100644 --- a/hw/top_earlgrey/rtl/padring.sv +++ b/hw/top_earlgrey/rtl/padring.sv
@@ -105,7 +105,6 @@ ); end else begin : gen_no_physical_pads assign pad_pok = '0; - assign phys_in_o = '0; end endmodule : padring
diff --git a/util/topgen/templates/chiplevel.sv.tpl b/util/topgen/templates/chiplevel.sv.tpl index 93cb79e..c900637 100644 --- a/util/topgen/templates/chiplevel.sv.tpl +++ b/util/topgen/templates/chiplevel.sv.tpl
@@ -255,7 +255,7 @@ .NMioPads(${len(muxed_pads)}), % if target["name"] == "asic": .PhysicalPads(1), - .NIoBanks(IoBankCount), + .NIoBanks(int'(IoBankCount)), .DioScanRole ({ % for pad in list(reversed(dedicated_pads)): scan_role_pkg::${lib.Name.from_snake_case('dio_pad_' + pad["name"] + '_scan_role').as_camel_case()}${"" if loop.last else ","} @@ -539,6 +539,10 @@ assign manual_out_cc2 = 1'b0; assign manual_oe_cc2 = 1'b0; + assign manual_out_flash_test_mode0 = 1'b0; + assign manual_oe_flash_test_mode0 = 1'b0; + assign manual_out_flash_test_mode1 = 1'b0; + assign manual_oe_flash_test_mode1 = 1'b0; assign manual_out_flash_test_volt = 1'b0; assign manual_oe_flash_test_volt = 1'b0; @@ -551,6 +555,8 @@ assign manual_attr_por_n = '0; assign manual_attr_cc1 = '0; assign manual_attr_cc2 = '0; + assign manual_attr_flash_test_mode0 = '0; + assign manual_attr_flash_test_mode1 = '0; assign manual_attr_flash_test_volt = '0; assign manual_attr_flash_test_mode0 = '0; assign manual_attr_flash_test_mode1 = '0; @@ -612,6 +618,8 @@ // Tie-off unused signals assign dio_in[DioUsbdevSense] = 1'b0; assign dio_in[DioUsbdevSe0] = 1'b0; + assign dio_in[DioUsbdevDpPullup] = 1'b0; + assign dio_in[DioUsbdevDnPullup] = 1'b0; assign dio_in[DioUsbdevTxModeSe] = 1'b0; assign dio_in[DioUsbdevSuspend] = 1'b0; @@ -664,9 +672,8 @@ logic usb_ref_val; // adc - // The adc package definition should eventually be moved to the adc module - ast_pkg::adc_ast_req_t adc_i; - ast_pkg::adc_ast_rsp_t adc_o; + ast_pkg::adc_ast_req_t adc_req; + ast_pkg::adc_ast_rsp_t adc_rsp; // entropy source interface // The entropy source pacakge definition should eventually be moved to es @@ -727,10 +734,6 @@ import rstmgr_pkg::DomainAonSel; import rstmgr_pkg::Domain0Sel; - // adc connections - ast_pkg::adc_ast_req_t adc_req; - ast_pkg::adc_ast_rsp_t adc_rsp; - // external clock comes in at a fixed position logic ext_clk; assign ext_clk = mio_in_raw[MioPadIoc6];
diff --git a/util/topgen/templates/toplevel.sv.tpl b/util/topgen/templates/toplevel.sv.tpl index 444592e..855231e 100644 --- a/util/topgen/templates/toplevel.sv.tpl +++ b/util/topgen/templates/toplevel.sv.tpl
@@ -775,14 +775,13 @@ // All dedicated inputs <% idx = 0 %>\ logic [${num_dio_total-1}:0] unused_dio_p2d; + assign unused_dio_p2d = dio_p2d; % for sig in top["pinmux"]["ios"]: <% literal = lib.get_io_enum_literal(sig, 'dio') %>\ % if sig["connection"] != "muxed" and sig["type"] in ["inout"]: assign cio_${sig["name"]}_p2d${"[" + str(sig["idx"]) +"]" if sig["idx"] !=-1 else ""} = dio_p2d[${literal}]; % elif sig["connection"] != "muxed" and sig["type"] in ["input"]: assign cio_${sig["name"]}_p2d${"[" + str(sig["idx"]) +"]" if sig["idx"] !=-1 else ""} = dio_p2d[${literal}]; - % elif sig["connection"] != "muxed" and sig["type"] in ["output"]: - assign unused_dio_p2d[${idx}] = dio_p2d[${literal}];<% idx += 1 %> % endif % endfor
diff --git a/util/topgen/templates/toplevel_pkg.sv.tpl b/util/topgen/templates/toplevel_pkg.sv.tpl index ffd60ed..234c618 100644 --- a/util/topgen/templates/toplevel_pkg.sv.tpl +++ b/util/topgen/templates/toplevel_pkg.sv.tpl
@@ -42,7 +42,7 @@ // Enumeration of IO power domains. // Only used in ASIC target. - typedef enum { + typedef enum logic [${len(top["pinout"]["banks"]).bit_length()-1}:0] { % for bank in top["pinout"]["banks"]: ${lib.Name(['io', 'bank', bank]).as_camel_case()} = ${loop.index}, % endfor