[rom_ctrl] Remove SkipCheck parameter
Everything's wired in properly now: no need for the bodge any more.
Signed-off-by: Rupert Swarbrick <rswarbrick@lowrisc.org>
diff --git a/hw/ip/rom_ctrl/data/rom_ctrl.hjson b/hw/ip/rom_ctrl/data/rom_ctrl.hjson
index f864104..ab50fdf 100644
--- a/hw/ip/rom_ctrl/data/rom_ctrl.hjson
+++ b/hw/ip/rom_ctrl/data/rom_ctrl.hjson
@@ -32,15 +32,6 @@
randcount: "128",
randtype: "data"
}
-
- { name: "SkipCheck",
- type: "bit",
- desc: "Skip rom power up check"
- // TODO: flip this to 0 when infrastructure is ready
- default: "1"
- local: "false",
- expose: "true"
- }
]
alert_list: [
{ name: "fatal"
diff --git a/hw/ip/rom_ctrl/dv/tb.sv b/hw/ip/rom_ctrl/dv/tb.sv
index ab9ec80..0be5183 100644
--- a/hw/ip/rom_ctrl/dv/tb.sv
+++ b/hw/ip/rom_ctrl/dv/tb.sv
@@ -38,7 +38,6 @@
// dut
rom_ctrl #(
- .SkipCheck (1'b0),
.RndCnstScrNonce (RND_CNST_SCR_NONCE),
.RndCnstScrKey (RND_CNST_SCR_KEY)
) dut (
diff --git a/hw/ip/rom_ctrl/rtl/rom_ctrl.sv b/hw/ip/rom_ctrl/rtl/rom_ctrl.sv
index 575b52b..83ee3bb 100644
--- a/hw/ip/rom_ctrl/rtl/rom_ctrl.sv
+++ b/hw/ip/rom_ctrl/rtl/rom_ctrl.sv
@@ -11,8 +11,7 @@
parameter BootRomInitFile = "",
parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
parameter bit [63:0] RndCnstScrNonce = '0,
- parameter bit [127:0] RndCnstScrKey = '0,
- parameter bit SkipCheck = 1'b1
+ parameter bit [127:0] RndCnstScrKey = '0
) (
input clk_i,
input rst_ni,
@@ -224,8 +223,7 @@
rom_ctrl_fsm #(
.RomDepth (RomSizeWords),
- .TopCount (8),
- .SkipCheck (SkipCheck)
+ .TopCount (8)
) u_checker_fsm (
.clk_i (clk_i),
.rst_ni (rst_ni),
diff --git a/hw/ip/rom_ctrl/rtl/rom_ctrl_compare.sv b/hw/ip/rom_ctrl/rtl/rom_ctrl_compare.sv
index f662dcd..c201eb2 100644
--- a/hw/ip/rom_ctrl/rtl/rom_ctrl_compare.sv
+++ b/hw/ip/rom_ctrl/rtl/rom_ctrl_compare.sv
@@ -17,8 +17,7 @@
`include "prim_assert.sv"
module rom_ctrl_compare #(
- parameter int NumWords = 2,
- parameter bit SkipCheck = 1'b1
+ parameter int NumWords = 2
) (
input logic clk_i,
input logic rst_ni,
@@ -147,7 +146,7 @@
assign matches_d = matches_q && (digest_word == exp_digest_word);
assign done_o = (state_q == Done);
- assign good_o = matches_q | SkipCheck;
+ assign good_o = matches_q;
assign alert_o = fsm_alert | start_alert | wait_addr_alert | done_addr_alert;
diff --git a/hw/ip/rom_ctrl/rtl/rom_ctrl_fsm.sv b/hw/ip/rom_ctrl/rtl/rom_ctrl_fsm.sv
index 01ac6ec..9ba3def 100644
--- a/hw/ip/rom_ctrl/rtl/rom_ctrl_fsm.sv
+++ b/hw/ip/rom_ctrl/rtl/rom_ctrl_fsm.sv
@@ -10,8 +10,7 @@
import prim_util_pkg::vbits;
#(
parameter int RomDepth = 16,
- parameter int TopCount = 8,
- parameter bit SkipCheck = 1'b0
+ parameter int TopCount = 8
) (
input logic clk_i,
input logic rst_ni,
@@ -86,8 +85,7 @@
logic start_checker_q;
logic checker_done, checker_good, checker_alert;
rom_ctrl_compare #(
- .NumWords (TopCount),
- .SkipCheck (SkipCheck)
+ .NumWords (TopCount)
) u_compare (
.clk_i (clk_i),
.rst_ni (rst_ni),
diff --git a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
index 978e8d2..1bc98fd 100644
--- a/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
+++ b/hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
@@ -5240,14 +5240,6 @@
default: 0x23c074e020fd502869582e71443c8be0
randwidth: 128
}
- {
- name: SkipCheck
- desc: Skip rom power up check
- type: bit
- default: "1"
- expose: "true"
- name_top: RomCtrlSkipCheck
- }
]
inter_signal_list:
[
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
index c6cd98b..3ff7800 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_asic.sv
@@ -9,10 +9,7 @@
// -o hw/top_earlgrey/ \
// --rnd_cnst_seed 4881560218908238235
-module chip_earlgrey_asic #(
- // TODO: Remove this 0 once infra is ready
- parameter bit RomCtrlSkipCheck = 1
-) (
+module chip_earlgrey_asic (
// Dedicated Pads
inout POR_N, // Manual Pad
inout USB_P, // Manual Pad
@@ -1084,8 +1081,7 @@
.KmacReuseShare(0),
.SramCtrlRetAonInstrExec(0),
.SramCtrlMainInstrExec(1),
- .PinmuxAonTargetCfg(PinmuxTargetCfg),
- .RomCtrlSkipCheck(RomCtrlSkipCheck)
+ .PinmuxAonTargetCfg(PinmuxTargetCfg)
) top_earlgrey (
.rst_ni ( aon_pok ),
// ast connections
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
index 8c1e1ff..3ba7434 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_cw310.sv
@@ -15,9 +15,7 @@
parameter BootRomInitFile = "boot_rom_fpga_cw310.32.vmem",
// Path to a VMEM file containing the contents of the emulated OTP, which will be
// baked into the FPGA bitstream.
- parameter OtpCtrlMemInitFile = "otp_img_fpga_cw310.vmem",
- // TODO: Remove this 0 once infra is ready
- parameter bit RomCtrlSkipCheck = 1
+ parameter OtpCtrlMemInitFile = "otp_img_fpga_cw310.vmem"
) (
// Dedicated Pads
inout POR_N, // Manual Pad
diff --git a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
index 7d7dc5c..78a06e9 100644
--- a/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
+++ b/hw/top_earlgrey/rtl/autogen/chip_earlgrey_nexysvideo.sv
@@ -15,9 +15,7 @@
parameter BootRomInitFile = "boot_rom_fpga_nexysvideo.32.vmem",
// Path to a VMEM file containing the contents of the emulated OTP, which will be
// baked into the FPGA bitstream.
- parameter OtpCtrlMemInitFile = "otp_img_fpga_nexysvideo.vmem",
- // TODO: Remove this 0 once infra is ready
- parameter bit RomCtrlSkipCheck = 1
+ parameter OtpCtrlMemInitFile = "otp_img_fpga_nexysvideo.vmem"
) (
// Dedicated Pads
inout POR_N, // Manual Pad
diff --git a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
index d368df2..65707c8 100644
--- a/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
+++ b/hw/top_earlgrey/rtl/autogen/top_earlgrey.sv
@@ -27,7 +27,6 @@
parameter bit OtbnStub = 0,
parameter otbn_pkg::regfile_e OtbnRegFile = otbn_pkg::RegFileFF,
parameter RomCtrlBootRomInitFile = "",
- parameter bit RomCtrlSkipCheck = 1,
// Manually defined parameters
parameter ibex_pkg::regfile_e IbexRegFile = ibex_pkg::RegFileFF,
@@ -2372,8 +2371,7 @@
.AlertAsyncOn(alert_handler_reg_pkg::AsyncOn[38:38]),
.BootRomInitFile(RomCtrlBootRomInitFile),
.RndCnstScrNonce(RndCnstRomCtrlScrNonce),
- .RndCnstScrKey(RndCnstRomCtrlScrKey),
- .SkipCheck(RomCtrlSkipCheck)
+ .RndCnstScrKey(RndCnstRomCtrlScrKey)
) u_rom_ctrl (
// [38]: fatal
.alert_tx_o ( alert_tx[38:38] ),
diff --git a/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson b/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson
index 9af80b7..f3909ed 100644
--- a/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson
+++ b/hw/top_earlgrey/syn/chip_earlgrey_asic_syn_cfg.hjson
@@ -24,12 +24,6 @@
name: expand_modules
value: "top_earlgrey"
}
-
- {
- name: params
- value: "RomCtrlSkipCheck=0"
- }
-
]
// Timing constraints for this module
diff --git a/util/topgen/templates/chiplevel.sv.tpl b/util/topgen/templates/chiplevel.sv.tpl
index 9865a58..b01dc4a 100644
--- a/util/topgen/templates/chiplevel.sv.tpl
+++ b/util/topgen/templates/chiplevel.sv.tpl
@@ -80,15 +80,10 @@
parameter BootRomInitFile = "boot_rom_fpga_${target["name"]}.32.vmem",
// Path to a VMEM file containing the contents of the emulated OTP, which will be
// baked into the FPGA bitstream.
- parameter OtpCtrlMemInitFile = "otp_img_fpga_${target["name"]}.vmem",
- // TODO: Remove this 0 once infra is ready
- parameter bit RomCtrlSkipCheck = 1
+ parameter OtpCtrlMemInitFile = "otp_img_fpga_${target["name"]}.vmem"
) (
% else:
-module chip_${top["name"]}_${target["name"]} #(
- // TODO: Remove this 0 once infra is ready
- parameter bit RomCtrlSkipCheck = 1
-) (
+module chip_${top["name"]}_${target["name"]} (
% endif
<%
@@ -940,8 +935,7 @@
.KmacReuseShare(0),
.SramCtrlRetAonInstrExec(0),
.SramCtrlMainInstrExec(1),
- .PinmuxAonTargetCfg(PinmuxTargetCfg),
- .RomCtrlSkipCheck(RomCtrlSkipCheck)
+ .PinmuxAonTargetCfg(PinmuxTargetCfg)
) top_${top["name"]} (
.rst_ni ( aon_pok ),
// ast connections
