vec_iree: Add springbok_bytecode_module for tflite codegen Wrap iree_bytecode_module with tflite extension detection, and add iree-import-tflite to perform tflite codegen Move the common iree-tranlate flags into default flags for springbok_bytecode_module. Change-Id: I0354d89bf00e56f80b8c6c934e54c329c89ef346
diff --git a/CMakeLists.txt b/CMakeLists.txt index 2a3b606..6b1c301 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt
@@ -8,6 +8,10 @@ set_property(GLOBAL PROPERTY USE_FOLDERS ON) +list(APPEND CMAKE_MODULE_PATH + ${CMAKE_CURRENT_LIST_DIR}/cmake/ +) + set(BUILD_RV64_LINUX OFF CACHE BOOL "Build RISC-V 64-bit Linux target (default: OFF)") #------------------------------------------------------------------------------- @@ -44,9 +48,9 @@ add_definitions(-DIREE_USER_CONFIG_H="${SPRINGBOK_CONFIG_HEADER}") endif() -# Springbok BSPrelated setting +# Springbok BSP-related setting if(${BUILD_WITH_SPRINGBOK}) - include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/riscv_springbok.cmake) + include(riscv_springbok) else() # Add the LOG_X header file for build compatibility. include_directories($ENV{ROOTDIR}/sw/vec/springbok/include) @@ -59,5 +63,6 @@ # functions properly in this project. include($ENV{ROOTDIR}/toolchain/iree/build_tools/cmake/iree_copts.cmake) +include(springbok_bytecode_module) # Add the included directory here. add_subdirectory(samples)
diff --git a/cmake/springbok_bytecode_module.cmake b/cmake/springbok_bytecode_module.cmake new file mode 100644 index 0000000..427139e --- /dev/null +++ b/cmake/springbok_bytecode_module.cmake
@@ -0,0 +1,87 @@ +include(CMakeParseArguments) + +# springbok_bytecode_module() +# +# A wrapper for the iree_bytecode_module to apply common iree-translate flags +# Parameters: +# NAME: Name of target. +# SRC: Source file to compile into a bytecode module. Support relative path. +# FLAGS: Flags to pass to the translation tool (list of strings). +# C_IDENTIFIER: Identifier to use for generate c embed code. +# If omitted then no C embed code will be generated. +# +# Examples: +# springbok_bytecode_module( +# NAME +# dare_devel_bytecode_module_dylib +# SRC +# "daredevil_quant.tflite" +# C_IDENTIFIER +# "daredevil_bytecode_module_dylib" +# FLAGS +# "-iree-input-type=tosa" +# ) +# +# springbok_bytecode_module( +# NAME +# simple_float_mul_bytecode_module_dylib +# SRC +# "simple_float_mul.mlir" +# C_IDENTIFIER +# "simple_float_mul_bytecode_module_dylib" +# FLAGS +# "-iree-input-type=mhlo" +# PUBLIC +# ) +# +function(springbok_bytecode_module) + cmake_parse_arguments( + _RULE + "" + "NAME;SRC;C_IDENTIFIER" + "FLAGS" + ${ARGN} + ) + + set(_MLIR_SRC "${_RULE_SRC}") + string(FIND "${_RULE_SRC}" ".tflite" _IS_TFLITE REVERSE) + if(${_IS_TFLITE} GREATER 0) + find_program(IREE_IMPORT_TFLITE_TOOL "iree-import-tflite" REQUIRED) + set(_MLIR_SRC "${CMAKE_CURRENT_BINARY_DIR}/${_RULE_NAME}.mlir") + get_filename_component(_SRC_PATH "${_RULE_SRC}" REALPATH) + set(_ARGS "${_SRC_PATH}") + list(APPEND _ARGS "-o") + list(APPEND _ARGS "${_RULE_NAME}.mlir") + # Only add the custom_command here. The output is passed to + # iree_bytecode_module as the source. + add_custom_command( + OUTPUT + "${_RULE_NAME}.mlir" + COMMAND + ${IREE_IMPORT_TFLITE_TOOL} + ${_ARGS} + DEPENDS + ${IREE_IMPORT_TFLITE_TOOL} + ) + endif() + + iree_bytecode_module( + NAME + "${_RULE_NAME}" + SRC + "${_MLIR_SRC}" + C_IDENTIFIER + "${_RULE_C_IDENTIFIER}" + FLAGS + "-iree-mlir-to-vm-bytecode-module" + "-iree-hal-target-backends=dylib-llvm-aot" + "-iree-llvm-target-triple=riscv32-pc-linux-elf" + "-iree-llvm-target-cpu=generic-rv32" + "-iree-llvm-target-cpu-features=+m,+f,+experimental-v" + "-iree-llvm-target-abi=ilp32" + "-iree-llvm-link-embedded=true" + "-iree-llvm-debug-symbols=false" + "${_RULE_FLAGS}" + PUBLIC + ) +endfunction()
diff --git a/samples/simple_vec_mul/CMakeLists.txt b/samples/simple_vec_mul/CMakeLists.txt index 647effc..3163c5b 100644 --- a/samples/simple_vec_mul/CMakeLists.txt +++ b/samples/simple_vec_mul/CMakeLists.txt
@@ -1,10 +1,10 @@ #------------------------------------------------------------------------------- # Build the mlir bytecode modules with iree-translate. Note the last two flags -# and "+experimental-v" are for RVV support. +# are for RVV support. # https://github.com/llvm/llvm-project/blob/f4ec30d/llvm/lib/Target/RISCV/RISCVSubtarget.cpp#L30-L46 #------------------------------------------------------------------------------- -iree_bytecode_module( +springbok_bytecode_module( NAME simple_float_mul_bytecode_module_dylib SRC @@ -13,23 +13,12 @@ "samples_simple_vec_mul_simple_float_mul_bytecode_module_dylib" FLAGS "-iree-input-type=mhlo" - "-iree-mlir-to-vm-bytecode-module" - "-iree-hal-target-backends=dylib-llvm-aot" - "-iree-llvm-target-triple=riscv32-pc-linux-elf" - "-iree-llvm-target-cpu=generic-rv32" - "-iree-llvm-target-cpu-features=+m,+f,+experimental-v" - "-iree-llvm-target-abi=ilp32" - "-iree-llvm-link-embedded=true" - "-iree-llvm-debug-symbols=false" "-riscv-v-vector-bits-min=512" "-riscv-v-fixed-length-vector-lmul-max=8" PUBLIC ) -# Temporarily disable RVV for the int32 version so the binary can be run on -# renode. -# TODO(b/195201585): Re-enable RVV. -iree_bytecode_module( +springbok_bytecode_module( NAME simple_int_mul_bytecode_module_dylib SRC @@ -38,14 +27,6 @@ "samples_simple_vec_mul_simple_int_mul_bytecode_module_dylib" FLAGS "-iree-input-type=mhlo" - "-iree-mlir-to-vm-bytecode-module" - "-iree-hal-target-backends=dylib-llvm-aot" - "-iree-llvm-target-triple=riscv32-pc-linux-elf" - "-iree-llvm-target-cpu=generic-rv32" - "-iree-llvm-target-cpu-features=+m,+f,+experimental-v" - "-iree-llvm-target-abi=ilp32" - "-iree-llvm-link-embedded=true" - "-iree-llvm-debug-symbols=false" "-riscv-v-vector-bits-min=512" "-riscv-v-fixed-length-vector-lmul-max=8" PUBLIC