sw:vec_iree: Disable RVV codegen for static library workload

Need to update the riscv toolchain to make the experimental extensions
behave correctly.

BUG: 215397476
Change-Id: I9493a91b8d70a7ac80644935f08c4eaab2325487

cmake/springbok_c_module.cmake

diff --git a/cmake/springbok_c_module.cmake b/cmake/springbok_c_module.cmake
index 929f4ad..e111263 100644
--- a/cmake/springbok_c_module.cmake
+++ b/cmake/springbok_c_module.cmake
@@ -86,7 +86,8 @@
   list(APPEND _TRANSLATE_ARGS "-iree-hal-target-backends=dylib-llvm-aot")
   list(APPEND _TRANSLATE_ARGS "-iree-llvm-target-triple=riscv32-pc-linux-elf")
   list(APPEND _TRANSLATE_ARGS "-iree-llvm-target-cpu=generic-rv32")
-  list(APPEND _TRANSLATE_ARGS "-iree-llvm-target-cpu-features=+m,+f,+experimental-v")
+  #TODO(b/215397476): Re-enable RVV for static library
+  list(APPEND _TRANSLATE_ARGS "-iree-llvm-target-cpu-features=+m,+f")
   list(APPEND _TRANSLATE_ARGS "-iree-llvm-target-abi=ilp32")
   list(APPEND _TRANSLATE_ARGS "-iree-llvm-link-embedded=false")
   list(APPEND _TRANSLATE_ARGS "-iree-llvm-link-static")