sw:vec_iree: remove depreciated flag riscv-v-vector-bits-min

Remove "riscv-v-vector-bits-min=512" in cmake files.

Change-Id: Icea3a715ab7a0516ca039c2b290cf79e3cdba39c

samples/microbenchmarks/CMakeLists.txt

diff --git a/samples/microbenchmarks/CMakeLists.txt b/samples/microbenchmarks/CMakeLists.txt
index bf2c208..ccc73db 100644
--- a/samples/microbenchmarks/CMakeLists.txt
+++ b/samples/microbenchmarks/CMakeLists.txt
@@ -11,7 +11,6 @@
     "conv1x1_test.mlir"
   FLAGS
     "-iree-input-type=tosa"
-    "-riscv-v-vector-bits-min=512"
     "-riscv-v-fixed-length-vector-lmul-max=8"
   EMITC
 )
@@ -23,7 +22,6 @@
     "conv1x1_test.mlir"
   FLAGS
     "-iree-input-type=tosa"
-    "-riscv-v-vector-bits-min=512"
     "-riscv-v-fixed-length-vector-lmul-max=8"
   EMITC
   VMVX

samples/simple_vec_mul/CMakeLists.txt

diff --git a/samples/simple_vec_mul/CMakeLists.txt b/samples/simple_vec_mul/CMakeLists.txt
index 50ab1e2..7a8a581 100644
--- a/samples/simple_vec_mul/CMakeLists.txt
+++ b/samples/simple_vec_mul/CMakeLists.txt
@@ -13,7 +13,6 @@
     "samples_simple_vec_mul_simple_float_mul"
   FLAGS
     "-iree-input-type=mhlo"
-    "-riscv-v-vector-bits-min=512"
     "-riscv-v-fixed-length-vector-lmul-max=8"
   VMVX
   INLINE_HAL
@@ -28,7 +27,6 @@
     "samples_simple_vec_mul_simple_int_mul"
   FLAGS
     "-iree-input-type=mhlo"
-    "-riscv-v-vector-bits-min=512"
     "-riscv-v-fixed-length-vector-lmul-max=8"
   VMVX
   INLINE_HAL