Merge "Update PLIC register map."
diff --git a/platform/src/timer.rs b/platform/src/timer.rs
index 362afd5..b7dd21f 100644
--- a/platform/src/timer.rs
+++ b/platform/src/timer.rs
@@ -20,9 +20,12 @@
register_structs! {
pub TimerRegisters {
- (0x000 => ctrl: ReadWrite<u32, ctrl::Register>),
-
- (0x004 => _reserved),
+ // There's a bug in register_structs! - if the register map is
+ // non-contiguous, you have to put a read-only register at the end of
+ // each chunk or the addresses in the generated code are wrong. :/
+ (0x000 => alert_test: ReadWrite<u32>),
+ (0x004 => ctrl: ReadWrite<u32, ctrl::Register>),
+ (0x008 => _fake_register_to_fix_bug),
(0x100 => config: ReadWrite<u32, config::Register>),
@@ -75,7 +78,7 @@
regs.compare_high.set(0);
regs.value_low.set(0xFFFF_0000);
regs.intr_enable.write(intr::timer0::CLEAR);
- regs.ctrl.write(ctrl::enable::SET);
+ regs.ctrl.set(1);
}
pub fn service_interrupt(&self) {
