commit a1d613e2e1905150162b1132b8fa2913487600fc
author Austin Appleby <aappleby@google.com> Thu Oct 28 18:59:46 2021 -0700
committer Austin Appleby <aappleby@google.com> Thu Oct 28 18:59:46 2021 -0700
tree ccfe4e44029809c24531923af9098243825e6936
parent 261b7fc6e27d6f4366d76963e7added8102cbfb7

Fix broken build due to bad merge of debug_uart.rs

Change-Id: I6373f61910fb5d05677a4c99c47877c5504f7035

board/src/main.rs

diff --git a/board/src/main.rs b/board/src/main.rs
index c1dcffb..9025306 100644
--- a/board/src/main.rs
+++ b/board/src/main.rs
@@ -13,8 +13,6 @@
 use capsules::virtual_hmac::VirtualMuxHmac;
 use kernel::capabilities;
 use kernel::common::dynamic_deferred_call::{DynamicDeferredCall, DynamicDeferredCallClientState};
-use kernel::common::registers::{ReadOnly, WriteOnly};
-use kernel::common::StaticRef;
 use kernel::component::Component;
 use kernel::hil;
 use kernel::hil::i2c::I2CMaster;
@@ -90,6 +88,23 @@
     }
 }
 
+
+pub struct MatchaHAL {
+}
+
+impl matcha_capsules::debug_uart::DebugUartHAL for MatchaHAL {
+    fn send_sync(&self, buf: &[u8], len: usize) {
+        unsafe {
+            let tx_busy = 0x4000_0010 as *const u32;
+            let tx_port = 0x4000_0018 as *mut u32;
+            for i in 0..len{
+                while (tx_busy.read_volatile() & 1) != 0 {}
+                tx_port.write_volatile(buf[i] as u32);
+            }
+        }
+    }
+}
+
 /// Reset Handler.
 ///
 /// This function is called from the arch crate after some very basic RISC-V
@@ -267,11 +282,15 @@
 
     matcha::i2c::I2C.set_master_client(i2c_master);
 
+    let matcha_hal = static_init!(
+        MatchaHAL,
+        MatchaHAL{}
+    );
+
     let debug_uart = static_init!(
         DebugUart,
         DebugUart {
-            tx_busy: StaticRef::new(0x4000_0010 as *const ReadOnly<u32>),
-            tx_port: StaticRef::new(0x4000_0018 as *const WriteOnly<u32>),
+            hal: matcha_hal,
             app_data_grant: board_kernel.create_grant(&memory_allocation_cap)
         }
     );

capsules/src/debug_uart.rs

diff --git a/capsules/src/debug_uart.rs b/capsules/src/debug_uart.rs
index a2b9035..1d6fe4c 100644
--- a/capsules/src/debug_uart.rs
+++ b/capsules/src/debug_uart.rs
@@ -25,26 +25,26 @@
 //!   let result = syscalls::command(driver_num, 0, buffer.len(), 0);
 //!   drop(allow);
 
-//use crate::driver;
-use kernel::common::registers::{ReadOnly, WriteOnly};
-use kernel::common::StaticRef;
 use kernel::{AppId, AppSlice, Callback, Driver, Grant, ReturnCode, Shared};
 
-//pub const DRIVER_NUM: usize = driver::NUM::DebugUart as usize;
 pub const DRIVER_NUM: usize = 0x00009 as usize;
 
+pub trait DebugUartHAL {
+    fn send_sync(&self, buf: &[u8], len: usize);
+}
+
 #[derive(Default)]
 pub struct AppData {
     pub buffer: Option<AppSlice<Shared, u8>>,
 }
 
 pub struct DebugUart {
-    pub tx_busy: StaticRef<ReadOnly<u32>>,
-    pub tx_port: StaticRef<WriteOnly<u32>>,
+    pub hal: &'static dyn DebugUartHAL,
     pub app_data_grant: Grant<AppData>,
 }
 
 impl Driver for DebugUart {
+
     fn subscribe(&self, _: usize, _: Option<Callback>, _: AppId) -> ReturnCode {
         ReturnCode::EINVAL
     }
@@ -56,10 +56,7 @@
 
         let _ = self.app_data_grant.enter(app_id, |app_data, _| {
             if let Some(buf) = &app_data.buffer {
-                for i in 0..r2 {
-                    while (self.tx_busy.get() & 1) != 0 {}
-                    self.tx_port.set(buf.as_ref()[i] as u32);
-                }
+                self.hal.send_sync(buf.as_ref(), r2);
             }
         });
         return ReturnCode::SUCCESS;