GPIO Pulse Before Benchmark Run

Edit kelvin benchmark to set GPIO high for duration of benchmark
This can be used to synchronize/ trim kibble power  measurements to the
approximate duration of a benchmark test.

Change-Id: I04480f49cf700cc39405080ff491fab81b269ef4

benchmarks/benchmark_sec.c

diff --git a/benchmarks/benchmark_sec.c b/benchmarks/benchmark_sec.c
index 251bd08..be05531 100644
--- a/benchmarks/benchmark_sec.c
+++ b/benchmarks/benchmark_sec.c
@@ -20,6 +20,7 @@
 #include "sw/device/lib/dif/dif_pinmux.h"
 #include "sw/device/lib/dif/dif_rv_plic.h"
 #include "sw/device/lib/dif/dif_smc_ctrl.h"
+#include "sw/device/lib/dif/dif_tlul_mailbox.h"
 #include "sw/device/lib/dif/dif_uart.h"
 #include "sw/device/lib/runtime/hart.h"
 #include "sw/device/lib/runtime/irq.h"
@@ -31,6 +32,8 @@
 #define STRINGIZE(x) #x
 #define STR(x) STRINGIZE(x)
 
+#define TRIGGER_GPIO 16
+
 // In order to include the model data generate from Bazel, include the header
 // using the name passed as a macro. For some reason this binary (vs Kelvin)
 // adds space when concatinating so use the model format -smc_bin.h.
@@ -39,12 +42,41 @@
 #define SMC_BINARY STR(SMC_BINARY_DIRECTORY/BENCHMARK_NAME-SMC_BINARY_TYPE)
 #include SMC_BINARY
 
+static dif_gpio_t gpio;
+static dif_rv_plic_t plic_sec;
+static dif_tlul_mailbox_t tlul_mailbox;
 static dif_pinmux_t pinmux;
 static dif_smc_ctrl_t smc_ctrl;
 static dif_uart_t uart;
 
 OTTF_DEFINE_TEST_CONFIG();
 
+void ottf_external_isr(void) {
+  uint32_t rx;
+  dif_rv_plic_irq_id_t plic_irq_id;
+
+  CHECK_DIF_OK(dif_rv_plic_irq_claim(&plic_sec, kTopMatchaPlicTargetIbex0,
+                                     &plic_irq_id));
+  top_matcha_plic_peripheral_t peripheral_id =
+      top_matcha_plic_interrupt_for_peripheral[plic_irq_id];
+
+  switch (peripheral_id) {
+    case kTopMatchaPlicPeripheralTlulMailboxSec: {
+      CHECK_DIF_OK(dif_tlul_mailbox_irq_acknowledge(&tlul_mailbox,
+                                                    kDifTlulMailboxIrqRtirq));
+      CHECK_DIF_OK(dif_tlul_mailbox_read_message(&tlul_mailbox, &rx));
+      CHECK_DIF_OK(dif_gpio_write(&gpio, TRIGGER_GPIO, rx));
+      break;
+    }
+    default:
+      LOG_FATAL("Unhandled interrupt");
+      break;
+  }
+
+  CHECK_DIF_OK(dif_rv_plic_irq_complete(&plic_sec, kTopMatchaPlicTargetIbex0,
+                                        plic_irq_id));
+}
+
 void _ottf_main(void) {
   // Initialize the UART to enable logging for non-DV simulation platforms.
   if (kDeviceType != kDeviceSimDV) {
@@ -56,6 +88,19 @@
   CHECK_DIF_OK(dif_smc_ctrl_init(
       mmio_region_from_addr(TOP_MATCHA_SMC_CTRL_BASE_ADDR), &smc_ctrl));
 
+// PinMux: J52.5 for Sparrow (IOR7) :: PMOD3.7 on Nexus (IOD4)
+#if defined(MATCHA_SPARROW)
+  CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopMatchaPinmuxMioOutIor7,
+                                        kTopMatchaPinmuxOutselGpioGpio16));
+#else
+  CHECK_DIF_OK(dif_pinmux_output_select(&pinmux, kTopMatchaPinmuxMioOutIod4,
+                                        kTopMatchaPinmuxOutselGpioGpio16));
+#endif
+  CHECK_DIF_OK(
+      dif_gpio_init(mmio_region_from_addr(TOP_MATCHA_GPIO_BASE_ADDR), &gpio));
+  CHECK_DIF_OK(
+      dif_gpio_output_set_enabled(&gpio, TRIGGER_GPIO, kDifToggleEnabled));
+
   LOG_INFO("Loading Kelvin binary");
   spi_flash_init();
   CHECK_DIF_OK(load_file_from_tar(
@@ -66,6 +111,24 @@
     LOG_INFO("Loading SMC binary");
     memcpy((void*)TOP_MATCHA_RAM_SMC_BASE_ADDR, smc_bin, smc_bin_len);
   }
+
+  // Enable Mailbox Interrupt
+  CHECK_DIF_OK(dif_tlul_mailbox_init(
+      mmio_region_from_addr(TOP_MATCHA_TLUL_MAILBOX_SEC_BASE_ADDR),
+      &tlul_mailbox));
+  CHECK_DIF_OK(dif_tlul_mailbox_irq_set_enabled(
+      &tlul_mailbox, kDifTlulMailboxIrqRtirq, kDifToggleEnabled));
+
+  CHECK_DIF_OK(dif_rv_plic_init(
+      mmio_region_from_addr(TOP_MATCHA_RV_PLIC_BASE_ADDR), &plic_sec));
+  CHECK_DIF_OK(dif_rv_plic_irq_set_enabled(
+      &plic_sec, kTopMatchaPlicIrqIdTlulMailboxSecRtirq,
+      kTopMatchaPlicTargetIbex0, kDifToggleEnabled));
+  CHECK_DIF_OK(dif_rv_plic_irq_set_priority(
+      &plic_sec, kTopMatchaPlicIrqIdTlulMailboxSecRtirq, 1));
+  irq_global_ctrl(true);
+  irq_external_ctrl(true);
+
   CHECK_DIF_OK(dif_smc_ctrl_set_en(&smc_ctrl));
   irq_global_ctrl(true);
   irq_external_ctrl(true);

benchmarks/benchmark_smc.c

diff --git a/benchmarks/benchmark_smc.c b/benchmarks/benchmark_smc.c
index ca0c1f6..887f00c 100644
--- a/benchmarks/benchmark_smc.c
+++ b/benchmarks/benchmark_smc.c
@@ -23,6 +23,7 @@
 #include "sw/device/lib/dif/dif_ml_top.h"
 #include "sw/device/lib/dif/dif_rv_plic.h"
 #include "sw/device/lib/dif/dif_rv_timer.h"
+#include "sw/device/lib/dif/dif_tlul_mailbox.h"
 #include "sw/device/lib/runtime/hart.h"
 #include "sw/device/lib/runtime/irq.h"
 #include "sw/device/lib/runtime/log.h"
@@ -41,6 +42,7 @@
 static dif_rv_timer_t rv_timer;
 static dif_uart_t smc_uart;
 static dif_ml_top_t ml_top;
+static dif_tlul_mailbox_t tlul_mailbox;
 
 volatile bool ml_top_finish_done = false;
 
@@ -113,9 +115,18 @@
   irq_global_ctrl(true);
   irq_external_ctrl(true);
 
+  // Configure Mailbox.
+  CHECK_DIF_OK(dif_tlul_mailbox_init(
+      mmio_region_from_addr(TOP_MATCHA_TLUL_MAILBOX_SMC_BASE_ADDR),
+      &tlul_mailbox));
+  {
+    uint32_t msg = 1;
+    CHECK_DIF_OK(dif_tlul_mailbox_send_message(&tlul_mailbox, &msg));
+  }
+
   LOG_INFO("========== Begin Benchmark (%s) ==========", STR(BENCHMARK_NAME));
 
-  // start kelvin
+  // start kelvin and pulse GPIO for data logger (Kibble)
   ml_top_finish_done = false;
   uint64_t timer_start;
   CHECK_DIF_OK(dif_rv_timer_counter_read(&rv_timer, 0, &timer_start));
@@ -142,6 +153,13 @@
   uint64_t average_cycles = udiv64_slow(cycles, iterations, NULL);
   uint64_t wall_time_us = timer_finish - timer_start;
   uint64_t average_wall_time_us = udiv64_slow(wall_time_us, iterations, NULL);
+
+  // End Test Pulse
+  {
+    uint32_t msg = 0;
+    CHECK_DIF_OK(dif_tlul_mailbox_send_message(&tlul_mailbox, &msg));
+  }
+
   LOG_INFO("Iterations: %d", iterations);
   _print64("Total Cycles", cycles);
   _print64("Average Cycles per Iteration", average_cycles);