blob: 375b48ddfecdec263ee964277909de7e6466e2c2 [file] [log] [blame]
// Copyright 2024 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include <cstdint>
extern "C" {
void isr_wrapper(void);
__attribute__((naked)) void isr_wrapper(void) {
asm volatile(
"csrr t0, mepc \n"
"addi t0, t0, 4 \n"
"csrw mepc, t0 \n"
"csrr t0, mcause \n"
"li t1, 0 \n"
"beq t0, t1, 0f \n"
"ebreak \n"
"0: mpause \n"
);
}
} // extern "C"
int main(int argc, char** argv) {
// Instruction address misaligned
asm volatile("csrw mtvec, %0" :: "rK"((uint32_t)(&isr_wrapper)));
asm volatile("la ra, 0x3; nop; nop; nop; nop; jalr ra,ra");
return 0;
}