Refactor Shodan repl assignments * Move the opentitan memory tags into secure.repl to align with the autogen result * Adjust memory map in secure.repl to match the definition in top_matcha.hjson * Move the smc memory tag into smc.repl Change-Id: Ib0a38cadc054fbe733c6118add292406a0ce5ce1
diff --git a/platforms/secure.repl b/platforms/secure.repl index 180f59c..1c548dd 100644 --- a/platforms/secure.repl +++ b/platforms/secure.repl
@@ -24,9 +24,9 @@ ram_sec: Memory.MappedMemory @ sysbus 0x10000000 size: 0x01000000 -// RAM_RET [‘h1800_0000 - ‘h1800_0FFF) 4KB RAM for debug/retention -ram_ret: Memory.MappedMemory @ sysbus 0x18000000 - size: 0x00001000 +// RAM_RET [‘h4060_0000 - ‘h4060_0FFF) 4KB RAM for debug/retention +// ram_ret_aon: Memory.MappedMemory @ sysbus 0x40600000 +// size: 0x1000 // eFLASH [‘h2000_0000 - ‘h20FF_FFFF) 16M eFlash for Security Core (debugging size) eflash: Memory.MappedMemory @ sysbus 0x20000000 @@ -110,7 +110,9 @@ // SENSOR_CTRL [‘h4049_0000 - ‘h4049_0FFF) 4KB Sensor Ctrl (Details need to be added for mic/cam interface) // SRAM_CTRL_RET_AON [‘h4050_0000 - ‘h4050_0FFF) 4KB AON RET_SRAM Ctrl -// bangfei confirms this is the right addr for test reg +// Simulated SRAM used to indicate test status to simulator +// Moved from the 0x30000000 defined in hw/top_matcha/dv/verilator/chip_sim.core +// as it collides with Springbok TCM location swteststatus: Miscellaneous.OpenTitan_VerilatorSwTestStatus @ sysbus 0x40600000 // FLASH_CTRL [‘h4100_0000 - ‘h4100_0FFF) 4KB Flash Control @@ -128,19 +130,63 @@ // AES [‘h4110_0000 - ‘h4110_0FFF) 4KB AES Control // HMAC [‘h4111_0000 - ‘h4111_0FFF) 4KB HMAC Control // KMAC [‘h4112_0000 - ‘h4112_0FFF) 4KB KMAC Control -// KEYMGR [‘h4113_0000 - ‘h4113_0FFF) 4KB KEY Manager +// OTBN ['h4113_0000 - 'h4113_FFFF) 64KB OTBN +// KEYMGR [‘h4114_0000 - ‘h4114_0FFF) 4KB KEY Manager // CSRNG [‘h4115_0000 - ‘h4115_0FFF) 4KB CSRNG (Cryptographically Secure Random Number Generator) Control // ENTROPY_SRC [‘h4116_0000 - ‘h4116_0FFF) 4KB ENTROPY SRC control // EDN0 [‘h4117_0000 - ‘h4117_0FFF) 4KB EDN0 // EDN1 [‘h4118_0000 - ‘h4118_0FFF) 4KB EDN1 // SRAM_CTRL_MAIN [‘h411C_0000 - ‘h411C_0FFF) 4KB SRAM Control -// OTBN [‘h411D_0000 - ‘h411D_0FFF) 4KB OTBN -// ISP [‘h4200_0000 - ‘h4200_FFFF) 64KB ISP registers -// DMA Ctrl [‘h4201_0000 - ‘h4201_FFFF) 64KB DMA control interface -// DSP Ctrl [‘h4202_0000 - ‘h4202_FFFF) 64KB Audio DSP control interface +// ROM_CTRL [‘h411E_0000 - ‘h411E_0FFF) 4KB ROM Control +// RV_CORE_IBEX [‘h411F_0000 - ‘h411F_0FFF) 4KB RV Core Ibex // Flash/MRAM [‘h4400_0000 - ‘h44FF_FFFF) 16MB External Non-Volatile Memory // TODO(b/197745020) - temporarily 36M for debug (non-LTO) rust component builds // NB: the last 4M are written with the ELF model extflash: Memory.MappedMemory @ sysbus 0x44000000 size: 0x02400000 + +// Tag memory for debugging +sysbus: + init: + Tag <0x40000000 0x1000> "OPENTITAN_EARLGREY_DEV_UART0" + Tag <0x40010000 0x1000> "OPENTITAN_EARLGREY_DEV_UART1" + Tag <0x40020000 0x1000> "OPENTITAN_EARLGREY_DEV_UART2" + Tag <0x40030000 0x1000> "OPENTITAN_EARLGREY_DEV_UART3" + Tag <0x40040000 0x1000> "OPENTITAN_EARLGREY_DEV_GPIO" + Tag <0x40050000 0x2000> "OPENTITAN_EARLGREY_DEV_SPI_DEVICE" + Tag <0x40060000 0x1000> "OPENTITAN_EARLGREY_DEV_SPI_HOST0" + Tag <0x40070000 0x1000> "OPENTITAN_EARLGREY_DEV_SPI_HOST1" + Tag <0x40080000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C0" + Tag <0x40090000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C1" + Tag <0x400A0000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C2" + Tag <0x400E0000 0x1000> "OPENTITAN_EARLGREY_DEV_PATTGEN" + Tag <0x40100000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_TIMER" + Tag <0x40110000 0x1000> "OPENTITAN_EARLGREY_DEV_USBDEV" + Tag <0x40130000 0x4000> "OPENTITAN_EARLGREY_DEV_OTP_CTRL" + Tag <0x40140000 0x1000> "OPENTITAN_EARLGREY_DEV_LC_CTRL" + Tag <0x40150000 0x1000> "OPENTITAN_EARLGREY_DEV_ALERT_HANDLER" + Tag <0x40400000 0x1000> "OPENTITAN_EARLGREY_DEV_PWRMGR_AON" + Tag <0x40410000 0x1000> "OPENTITAN_EARLGREY_DEV_RSTMGR_AON" + Tag <0x40420000 0x1000> "OPENTITAN_EARLGREY_DEV_CLKMGR_AON" + Tag <0x40440000 0x1000> "OPENTITAN_EARLGREY_DEV_ADC_CTRL_AON" + Tag <0x40460000 0x1000> "OPENTITAN_EARLGREY_DEV_PINMUX_AON" + Tag <0x40470000 0x1000> "OPENTITAN_EARLGREY_DEV_AON_TIMER_AON" + Tag <0x40480000 0x1000> "OPENTITAN_EARLGREY_DEV_AST" + Tag <0x40490000 0x1000> "OPENTITAN_EARLGREY_DEV_SENSOR_CTRL_AON" + Tag <0x40500000 0x1000> "OPENTITAN_EARLGREY_DEV_SRAM_CTRL_RET_AON" + Tag <0x41000000 0x1000> "OPENTITAN_EARLGREY_DEV_FLASH_CTRL" + Tag <0x41200000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_DM" + Tag <0x48000000 0x8000000> "OPENTITAN_EARLGREY_DEV_RV_PLIC" + Tag <0x41100000 0x1000> "OPENTITAN_EARLGREY_DEV_AES" + Tag <0x41110000 0x1000> "OPENTITAN_EARLGREY_DEV_HMAC" + Tag <0x41120000 0x1000> "OPENTITAN_EARLGREY_DEV_KMAC" + Tag <0x41130000 0x10000> "OPENTITAN_EARLGREY_DEV_OTBN" + Tag <0x41140000 0x1000> "OPENTITAN_EARLGREY_DEV_KEYMGR" + Tag <0x41150000 0x1000> "OPENTITAN_EARLGREY_DEV_CSRNG" + Tag <0x41160000 0x1000> "OPENTITAN_EARLGREY_DEV_ENTROPY" + Tag <0x41170000 0x1000> "OPENTITAN_EARLGREY_DEV_EDN0" + Tag <0x41180000 0x1000> "OPENTITAN_EARLGREY_DEV_EDN1" + Tag <0x411C0000 0x1000> "OPENTITAN_EARLGREY_DEV_SRAM_CTRL" + Tag <0x411E0000 0x1000> "OPENTITAN_EARLGREY_DEV_ROM_CTRL" + Tag <0x411F0000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_CORE_IBEX"
diff --git a/platforms/shodan.repl b/platforms/shodan.repl index fe181bb..b056767 100644 --- a/platforms/shodan.repl +++ b/platforms/shodan.repl
@@ -17,3 +17,7 @@ FinishIRQ -> smc_plic@12 InstructionFaultIRQ -> smc_plic@13 DataFaultIRQ -> smc_plic@14 + +// ISP [‘h4200_0000 - ‘h4200_FFFF) 64KB ISP registers +// DMA Ctrl [‘h4201_0000 - ‘h4201_FFFF) 64KB DMA control interface +// DSP Ctrl [‘h4202_0000 - ‘h4202_FFFF) 64KB Audio DSP control interface
diff --git a/platforms/smc.repl b/platforms/smc.repl index e5c3aa9..757ac95 100644 --- a/platforms/smc.repl +++ b/platforms/smc.repl
@@ -60,3 +60,8 @@ timer_smc: Timers.OpenTitan_Timer@ sysbus 0x50010000 frequency: 24000000 -> cpu1@5 + +// Tag memory for debugging +sysbus: + init: + Tag <0x50010000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_TIMER_SMC"
diff --git a/shodan.resc b/shodan.resc index 63f1ac0..94f75f6 100644 --- a/shodan.resc +++ b/shodan.resc
@@ -15,47 +15,6 @@ machine LoadPlatformDescription @sim/config/platforms/shodan.repl -sysbus Tag <0x40000000 0x1000> "OPENTITAN_EARLGREY_DEV_UART0" -sysbus Tag <0x40010000 0x1000> "OPENTITAN_EARLGREY_DEV_UART1" -sysbus Tag <0x40020000 0x1000> "OPENTITAN_EARLGREY_DEV_UART2" -sysbus Tag <0x40030000 0x1000> "OPENTITAN_EARLGREY_DEV_UART3" -sysbus Tag <0x40040000 0x1000> "OPENTITAN_EARLGREY_DEV_GPIO" -sysbus Tag <0x40050000 0x2000> "OPENTITAN_EARLGREY_DEV_SPI" -sysbus Tag <0x40060000 0x1000> "OPENTITAN_EARLGREY_DEV_SPI_HOST0" -sysbus Tag <0x40070000 0x1000> "OPENTITAN_EARLGREY_DEV_SPI_HOST1" -sysbus Tag <0x40080000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C0" -sysbus Tag <0x40090000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C1" -sysbus Tag <0x400A0000 0x1000> "OPENTITAN_EARLGREY_DEV_I2C2" -sysbus Tag <0x400E0000 0x1000> "OPENTITAN_EARLGREY_DEV_PATTGEN" -sysbus Tag <0x40100000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_TIMER" -sysbus Tag <0x50010000 0x1000> "OPENTITAN_EARLGREY_DEV_RV_TIMER_SMC" -sysbus Tag <0x40110000 0x1000> "OPENTITAN_EARLGREY_DEV_USBDEV" -sysbus Tag <0x40130000 0x4000> "OPENTITAN_EARLGREY_DEV_OTP_CTRL" -sysbus Tag <0x40140000 0x1000> "OPENTITAN_EARLGREY_DEV_LC_CTRL" -sysbus Tag <0x40150000 0x1000> "OPENTITAN_EARLGREY_DEV_ALERT_HANDLER" -sysbus Tag <0x40400000 0x1000> "OPENTITAN_EARLGREY_DEV_PWRMGR_AON" -sysbus Tag <0x40410000 0x1000> "OPENTITAN_EARLGREY_DEV_RSTMGR" -sysbus Tag <0x40420000 0x1000> "OPENTITAN_EARLGREY_DEV_CLKMGR" -sysbus Tag <0x40440000 0x1000> "OPENTITAN_EARLGREY_DEV_ADC_CTRL_AON" -sysbus Tag <0x40460000 0x1000> "OPENTITAN_EARLGREY_DEV_PINMUX_AON" -sysbus Tag <0x40470000 0x1000> "OPENTITAN_EARLGREY_DEV_AON_TIMER_AON" -sysbus Tag <0x40480000 0x1000> "OPENTITAN_EARLGREY_DEV_AST" -sysbus Tag <0x40490000 0x1000> "OPENTITAN_EARLGREY_DEV_SENSOR_CTRL_AON" -sysbus Tag <0x40500000 0x1000> "OPENTITAN_EARLGREY_DEV_SRAM_CTRL_RET_AON" -sysbus Tag <0x41000000 0x1000> "OPENTITAN_EARLGREY_DEV_FLASH_CTRL" -sysbus Tag <0x48000000 0x8000000> "OPENTITAN_EARLGREY_DEV_RV_PLIC" -sysbus Tag <0x41100000 0x1000> "OPENTITAN_EARLGREY_DEV_AES" -sysbus Tag <0x41110000 0x1000> "OPENTITAN_EARLGREY_DEV_HMAC" -sysbus Tag <0x41120000 0x1000> "OPENTITAN_EARLGREY_DEV_KMAC" -sysbus Tag <0x41130000 0x1000> "OPENTITAN_EARLGREY_DEV_KEYMGR" -sysbus Tag <0x41150000 0x1000> "OPENTITAN_EARLGREY_DEV_CSRNG" -sysbus Tag <0x41160000 0x1000> "OPENTITAN_EARLGREY_DEV_ENTROPY" -sysbus Tag <0x41170000 0x1000> "OPENTITAN_EARLGREY_DEV_EDN0" -sysbus Tag <0x41180000 0x1000> "OPENTITAN_EARLGREY_DEV_EDN1" -sysbus Tag <0x411C0000 0x1000> "OPENTITAN_EARLGREY_DEV_SRAM_CTRL" -sysbus Tag <0x411D0000 0x1000> "OPENTITAN_EARLGREY_DEV_OTBN" -sysbus Tag <0x411E0000 0x1000> "OPENTITAN_EARLGREY_DEV_ROM_CTRL_REGS" - $term_port?="/tmp/term" emulation CreateUartPtyTerminal "term" $term_port true connector Connect uart5 term