blob: ff264601111f8468d537ef115b7de3b9b0693e0d [file] [log] [blame]
Cindy Liuee965fc2022-03-15 17:37:10 -07001#! /bin/bash
2# Run verilator testbench simulation.
3
4if [[ $# -lt 4 || $1 == "--help" ]]; then
5 echo "Usage: run-chip-verilator-sim.sh <verilator testbech> <rom binary> <flash binary> <otp binary> [OPTIONS]"
6 exit 0
7fi
8
9VCHIP_TB=$1
10ROM_BIN=$2
11FLASH_BIN=$3
12OTP_BIN=$4
13
14shift 4
15
16if [[ ! -f $(realpath ${VCHIP_TB}) ]]; then
17 echo "Verilator testbench not found. Please run \`m matcha_hw_verilator_sim\` or generate the testbench first."
18 exit 1
19fi
20
21if [[ ! -f $(realpath ${ROM_BIN}) ]] || [[ ! -f $(realpath ${FLASH_BIN}) ]] ||
22 [[ ! -f $(realpath ${OTP_BIN}) ]]; then
23 echo "Software binaries not found. Please run \`m opentitan_sw_verilator_sim\` or generate the SW binaries first."
24 exit 1
25fi
26
27${VCHIP_TB} \
28 "--meminit=rom,${ROM_BIN}" \
29 "--meminit=flash,${FLASH_BIN}" \
30 "--meminit=otp,${OTP_BIN}" $@