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opensecura / hw / matcha / 6574fa669b40a2d32033763a18224d0b65067edc
commit6574fa669b40a2d32033763a18224d0b65067edc[log] [tgz]
authorSam Leffler <sleffler@google.com>Tue Jun 11 09:28:26 2024 -0700
committerSam Leffler <sleffler@google.com>Tue Aug 27 16:34:16 2024 -0700
tree73f9824639f0c9d3300430b3be6150f5ad765e12
parentca943b5628a55cbd5a1850deca7aa8f92263ecd0 [diff]
test_rom: initial bancha support

Changes in support of booting CHERIoT firmware images on a bancha system,
This has been tested only with OTP_IS_RAM and requires the 2nd-level
firmware image be loaded from SPI into RAM.

NB: 2nd-level firmware images currently lack the expected manifest

Specific changes:
- many files forked to isolate / simplify adding CHERI support
- memory layout is somewhat different per CHERIoT requirements (e.g.
  r/w data is collected in one ELF section for CGP-relative addressing)
- remove PMP usage because CHERIoT does not support it and it's use
  can be done with CHERI caps
- static_critical section size differs from non-CHERI
- eflash, flash_ctrl, spi_flash, and bootstrap api's take capabilities
  for the MMIO regions (using mmio_region_t) instead of crafting pointers
  from raw addresses
- tag the build target with "cheri" so we can filter it out for CI

Bypass-Presubmit-Reason: verified as part of topic

Change-Id: Iecbb7f9eaedc52a8988e7da9015d89e058f9d844
17 files changed
tree: 73f9824639f0c9d3300430b3be6150f5ad765e12
  1. constraints/
  2. doc/
  3. hw/
  4. platforms/
  5. rules/
  6. sw/
  7. third_party/
  8. toolchains/
  9. util/
  10. .bazelrc
  11. .bazelversion
  12. .gitignore
  13. BUILD.bazel
  14. CONTRIBUTING.md
  15. LICENSE
  16. PREUPLOAD.cfg
  17. README.md
  18. WORKSPACE
README.md

Matcha

About the project

Matcha is an open-source reference hardware implementation for Project Open Se Cura, a low-power, secure embedded platform for ambient ML applications.

About this repository

This repository contains hardware (RTL), software, and utilities written as part of the Matcha project.

Documentation

The project contains comprehensive documentation of the SOC, all IPs, and tools.

How to contribute

Have a look at our GettingStarted Guide for guidelines on how to contribute code to this repository.

Licensing

Unless otherwise noted, everything in this repository is covered by the Apache License, Version 2.0 (see LICENSE for full text).

Prerequisites

Development for matcha requires that the necessary tools and prerequisites be installed. See GettingStarted Guide

To setup the build system, run following steps at root of repo:

source build/setup.sh

Install the prerequisites:

m prereqs

Install the tools used for development:

m tools

Code/Repo Structure

<root_dir>/hw/matcha/
    hw/top_matcha/
        BUILD
        cdc/
        data/
        dv/
        formal/
        ip/
        ip_autogen/
        lint/
        rdc/
        rtl/
        sw/
        syn/
        util/
    hw/
        BUILD
        Makefile
    sw/
        BUILD
        device/
    util/
        BUILD
        dvsim_matcha/
        make_new_dif/
        openocd/
        topgen_util/
        topgen_matcha.py

<root_dir>/hw/opentitan_upstream/
<root_dir>/build/
<root_dir>/Manifest/
<root_dir>/Makefile
<root_dir>/GettingStarted.md
<toot_dir>/...

Quick start guide and cheat sheet

For following steps, make sure the above “Prerequisites” steps have been run if the repo is been checked out at the first time.

Build RTL top Level and generate registers, interrupt and address map:

m matcha_hw_generate_all

Build verilator simulation target:

m matcha_hw_verilator_sim

Run matcha verilator test suite

m matcha_hw_verilator_tests

Run FPGA compilation flow for Nexus FPGA board:

m matcha_hw_fpga_nexus

Bazel debug

Run matcha single test with messages to stdout

bazel test --test_output=streamed //sw/device/tests:verilator_mailbox_test

Run matcha test suites

bazel test --test_output=streamed //sw/device/tests:verilator_test_suite

Run FPGA compilation flow for Nexus FPGA board with debug commands:

bazel build -s //hw/bitstream/vivado:fpga_nexus

Simulation logs

Enable tracing on a single test

bazel test --test_output=streamed  --test_timeout=1000000 --test_arg=--trace //sw/device/tests:verilator_cam_ctrl_test

Note: --test_timeout=1000000 sets timeout in seconds. This helps prevent timeout issues then using trace.

Waveform dump and peripheral logs for a test located in:

<root_dir>/hw/matcha/bazel-testlogs/sw/device/tests/<test_name>/test.outputs/output.zip
    sim.fst (if tracing is enabled)
    uart0.log
    smc_uart.log
    spi0.log
    usb0.log

Note: The trace_core_#.log files available in output.zip is currently a TODO item.

The FPGA compiled bitstream and reports (resource utilization, pin assignment, etc) can be found in following directory:

<matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/impl_1/chip_matcha_nexus.bit <matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/impl_1/.rpt <matcha_root_dir>/bazel-bin/hw/bitstream/vivado/build.fpga_nexus/synth-vivado/google_systems_chip_matcha_nexus_0.1.runs/synth_1/.rpt

DV flow

Setup DV flow