tree 73f9824639f0c9d3300430b3be6150f5ad765e12
parent ca943b5628a55cbd5a1850deca7aa8f92263ecd0
author Sam Leffler <sleffler@google.com> 1718123306 -0700
committer Sam Leffler <sleffler@google.com> 1724801656 -0700

test_rom: initial bancha support

Changes in support of booting CHERIoT firmware images on a bancha system,
This has been tested only with OTP_IS_RAM and requires the 2nd-level
firmware image be loaded from SPI into RAM.

NB: 2nd-level firmware images currently lack the expected manifest

Specific changes:
- many files forked to isolate / simplify adding CHERI support
- memory layout is somewhat different per CHERIoT requirements (e.g.
  r/w data is collected in one ELF section for CGP-relative addressing)
- remove PMP usage because CHERIoT does not support it and it's use
  can be done with CHERI caps
- static_critical section size differs from non-CHERI
- eflash, flash_ctrl, spi_flash, and bootstrap api's take capabilities
  for the MMIO regions (using mmio_region_t) instead of crafting pointers
  from raw addresses
- tag the build target with "cheri" so we can filter it out for CI

Bypass-Presubmit-Reason: verified as part of topic

Change-Id: Iecbb7f9eaedc52a8988e7da9015d89e058f9d844