Merge "Add the build mode cover_reg_top_no_dma to solve the problem with chip_jtag_csr_rw"

hw/top_matcha/dv/chip_sim_cfg.hjson

diff --git a/hw/top_matcha/dv/chip_sim_cfg.hjson b/hw/top_matcha/dv/chip_sim_cfg.hjson
index 6e90b3a..27b8948 100644
--- a/hw/top_matcha/dv/chip_sim_cfg.hjson
+++ b/hw/top_matcha/dv/chip_sim_cfg.hjson
@@ -195,6 +195,10 @@
     //   build_opts: ["-cm_constfile {top_dv_path}/cov/constfile.txt"]
     //   is_sim_mode: 1
     // }
+    {
+      name: cover_reg_top_no_dma
+      en_build_modes: ["cover_reg_top"]
+    }
   ]
 
   // Add options needed to compile against otbn_memutil, otbn_tracer,
@@ -1745,6 +1749,7 @@
     }
     {
       name: chip_jtag_csr_rw
+      build_mode: "cover_reg_top_no_dma"
       uvm_test_seq: "chip_jtag_csr_rw_vseq"
       en_run_modes: ["stub_cpu_mode"]
       run_opts: ["+en_scb=0", "+csr_rw", "+create_jtag_riscv_map=1"]

util/topgen_matcha/gen_dv.py

diff --git a/util/topgen_matcha/gen_dv.py b/util/topgen_matcha/gen_dv.py
index a0c9549..da561c8 100755
--- a/util/topgen_matcha/gen_dv.py
+++ b/util/topgen_matcha/gen_dv.py
@@ -36,11 +36,20 @@
     if "cover_reg_top" in outdir:
         create_isp_wrapper = "1'b0"
 
+    # TODO(b/297065395):
+    # DMA should check byte write to its CSRs
+    #
+    # Also, rv_dm can't access dma0 at this time
+    create_dma = "1'b1"
+    if "no_dma" in outdir:
+        create_dma = "1'b0"
+
     # Expand template
     try:
         to_write = uvm_reg_tpl.render(top=top,
                                       dv_base_names=dv_base_names,
-                                      create_isp_wrapper=create_isp_wrapper)
+                                      create_isp_wrapper=create_isp_wrapper,
+                                      create_dma=create_dma)
     except:  # noqa: E722
         log.error(exceptions.text_error_template().render())
         return 1

util/topgen_matcha/top_uvm_reg.sv.tpl

diff --git a/util/topgen_matcha/top_uvm_reg.sv.tpl b/util/topgen_matcha/top_uvm_reg.sv.tpl
index 2ba63c7..98edc20 100644
--- a/util/topgen_matcha/top_uvm_reg.sv.tpl
+++ b/util/topgen_matcha/top_uvm_reg.sv.tpl
@@ -19,6 +19,8 @@
 ##
 ##    create_isp_wrapper	Create isp_wrapper RAL model based on the context
 ##
+##    create_dma     Create RAL models for dma0/dma_smc based on the context
+##
 ## Like uvm_reg.sv.tpl, we use functions from uvm_reg_base.sv.tpl to define
 ## per-device-interface code.
 ##
@@ -93,6 +95,9 @@
           create_block = "1'b0"
         elif inst_name == "isp_wrapper":
           create_block = create_isp_wrapper
+        elif (inst_name == "dma0" or
+              inst_name == "dma_smc"):
+          create_block = create_dma
 %>\
     bit create_${if_inst} = ${create_block};
     rand ${bcname(esc_if_name)} ${if_inst};