blob: 92271f5fd1133daa4b4bb6b4bed4f23128848db6 [file]
// Copyright 2023 Google LLC.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0
#include "hw/top_matcha/sw/autogen/top_matcha.h"
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/dif/dif_smc_ctrl.h"
#include "sw/device/lib/dif/dif_uart.h"
#include "sw/device/lib/runtime/print.h"
#include "sw/device/lib/testing/test_framework/check.h"
#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
#include "sw/device/tests/smc_supervisor_mode_test_bin.h"
OTTF_DEFINE_TEST_CONFIG();
static dif_smc_ctrl_t smc_ctrl;
static dif_uart_t uart;
void _ottf_main(void) {
CHECK_DIF_OK(
dif_uart_init(mmio_region_from_addr(TOP_MATCHA_UART0_BASE_ADDR), &uart));
CHECK_DIF_OK(
dif_uart_configure(&uart, (dif_uart_config_t){
.baudrate = kUartBaudrate,
.clk_freq_hz = kClockFreqPeripheralHz,
.parity_enable = kDifToggleDisabled,
.parity = kDifUartParityEven,
}));
base_uart_stdout(&uart);
LOG_INFO("Start supervisor_mode_test");
test_status_set(kTestStatusInTest);
// Copy embedded binary to SMC RAM.
if (kDeviceType != kDeviceSimVerilator) {
memcpy((void *)TOP_MATCHA_RAM_SMC_BASE_ADDR, smc_bin, smc_bin_len);
}
CHECK_DIF_OK(dif_smc_ctrl_init(
mmio_region_from_addr(TOP_MATCHA_SMC_CTRL_BASE_ADDR), &smc_ctrl));
CHECK_DIF_OK(dif_smc_ctrl_set_en(&smc_ctrl));
while (true) {
asm volatile("wfi");
}
}