sw/device/tests/rv_timer_test.c

// Copyright 2022 Google LLC.
// Copyright lowRISC contributors.
// Licensed under the Apache License, Version 2.0, see LICENSE for details.
// SPDX-License-Identifier: Apache-2.0

#include "hw/top_matcha/sw/autogen/top_matcha.h"
#include "sw/device/lib/arch/device.h"
#include "sw/device/lib/dif/dif_rv_timer.h"
#include "sw/device/lib/dif/dif_smc_ctrl.h"
#include "sw/device/lib/dif/dif_uart.h"
#include "sw/device/lib/runtime/hart.h"
#include "sw/device/lib/runtime/print.h"
#include "sw/device/lib/testing/test_framework/check.h"
#include "sw/device/lib/testing/test_framework/ottf_test_config.h"
#include "sw/device/tests/smc_rv_timer_test_bin.h"

OTTF_DEFINE_TEST_CONFIG();

static dif_rv_timer_t rv_timer;
static dif_smc_ctrl_t smc_ctrl;
static dif_uart_t uart;

void _ottf_main(void) {
  CHECK_DIF_OK(
      dif_uart_init(mmio_region_from_addr(TOP_MATCHA_UART0_BASE_ADDR), &uart));
  CHECK_DIF_OK(
      dif_uart_configure(&uart, (dif_uart_config_t){
                                    .baudrate = kUartBaudrate,
                                    .clk_freq_hz = kClockFreqPeripheralHz,
                                    .parity_enable = kDifToggleDisabled,
                                    .parity = kDifUartParityEven,
                                }));
  base_uart_stdout(&uart);

  LOG_INFO("Begin RV_TIMER test.");
  test_status_set(kTestStatusInTest);
  dif_rv_timer_tick_params_t tick_params;
  CHECK_DIF_OK(dif_rv_timer_approximate_tick_params(kClockFreqPeripheralHz,
                                                    1000000, &tick_params));

  CHECK_DIF_OK(dif_rv_timer_init(
      mmio_region_from_addr(TOP_MATCHA_RV_TIMER_BASE_ADDR), &rv_timer));
  CHECK_DIF_OK(dif_rv_timer_set_tick_params(&rv_timer, 0, tick_params));
  CHECK_DIF_OK(
      dif_rv_timer_counter_set_enabled(&rv_timer, 0, kDifToggleEnabled));

  uint64_t counter_start, counter_end;
  CHECK_DIF_OK(dif_rv_timer_counter_read(&rv_timer, 0, &counter_start));
  busy_spin_micros(1000);
  CHECK_DIF_OK(dif_rv_timer_counter_read(&rv_timer, 0, &counter_end));
  CHECK((counter_end - counter_start) >= 1000);
  CHECK((counter_end - counter_start) < 2000);

  LOG_INFO("Begin RV_TIMER test on SMC.");
  // Copy embedded binary to SMC RAM.
  if (kDeviceType != kDeviceSimVerilator) {
    memcpy((void *)TOP_MATCHA_RAM_SMC_BASE_ADDR, smc_bin, smc_bin_len);
  }
  CHECK_DIF_OK(dif_smc_ctrl_init(
      mmio_region_from_addr(TOP_MATCHA_SMC_CTRL_BASE_ADDR), &smc_ctrl));
  CHECK_DIF_OK(dif_smc_ctrl_set_en(&smc_ctrl));

  // Note: the SMC must end the simulation through testing or otherwise, as the
  // secure core indefinitely sleeps.
  asm volatile("wfi");
  __builtin_unreachable();
}