Remaining segmented load tests
* This test uses workaround for compiler bug
* Adds indexed segmented loads for SEW 32 for index width 16, 8
* Test : bazel run //tests/cocotb:rvv_load_store_test_load32_index16_seg
bazel run //tests/cocotb:rvv_load_store_test_load32_index8_seg
Change-Id: I1462a3143db9228a3e42315fcf14179e51f51044
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog