Remaining segmented load tests
* This test uses workaround for compiler bug
* Adds indexed segmented loads for SEW 32 for index width 16, 8
* Test : bazel run //tests/cocotb:rvv_load_store_test_load32_index16_seg
bazel run //tests/cocotb:rvv_load_store_test_load32_index8_seg
Change-Id: I1462a3143db9228a3e42315fcf14179e51f51044
diff --git a/tests/cocotb/BUILD b/tests/cocotb/BUILD
index fe9dc5e..e33dc35 100644
--- a/tests/cocotb/BUILD
+++ b/tests/cocotb/BUILD
@@ -206,6 +206,8 @@
"load16_stride4_m1_partial",
"load16_stride4_mf2",
"load32_index8",
+ "load32_index8_seg",
+ "load32_index16_seg",
"load32_index32_seg",
"load32_seg_unit",
"load32_stride8_m1",
diff --git a/tests/cocotb/rvv/load_store/BUILD b/tests/cocotb/rvv/load_store/BUILD
index 727c38d..f129395 100644
--- a/tests/cocotb/rvv/load_store/BUILD
+++ b/tests/cocotb/rvv/load_store/BUILD
@@ -113,6 +113,12 @@
"load32_index32_seg": {
"srcs": ["load32_index32_seg.cc"],
},
+ "load32_index16_seg": {
+ "srcs": ["load32_index16_seg.cc"],
+ },
+ "load32_index8_seg": {
+ "srcs": ["load32_index8_seg.cc"],
+ },
"load32_seg_unit": {
"srcs": ["load32_seg_unit.cc"],
},
@@ -197,6 +203,8 @@
":load16_stride4_m1_partial.elf",
":load16_stride4_mf2.elf",
":load32_index8.elf",
+ ":load32_index8_seg.elf",
+ ":load32_index16_seg.elf",
":load32_index32_seg.elf",
":load32_seg_unit.elf",
":load32_stride8_m1.elf",
diff --git a/tests/cocotb/rvv/load_store/load32_index16_seg.cc b/tests/cocotb/rvv/load_store/load32_index16_seg.cc
new file mode 100644
index 0000000..db8cbec
--- /dev/null
+++ b/tests/cocotb/rvv/load_store/load32_index16_seg.cc
@@ -0,0 +1,349 @@
+// Copyright 2025 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <riscv_vector.h>
+#include <stdint.h>
+
+namespace {
+constexpr size_t lut_size = 7000;
+// Double sized so we can check trailing regions are not read/written.
+constexpr size_t buf_size = 64;
+} // namespace
+
+size_t vl __attribute__((section(".data"))) = 4;
+// Indices are always unsigned.
+uint16_t index_buf[buf_size] __attribute__((section(".data")));
+// These instructions don't differentiate signed/unsigned so we only need to
+// test one. The types come from intrinsic level.
+uint32_t in_buf[lut_size] __attribute__((section(".data")));
+uint32_t out_buf[buf_size] __attribute__((section(".data")));
+
+extern "C" {
+// Unordered, segment 2
+__attribute__((used, retain)) void vluxseg2ei16_v_u32m1x2() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg2ei16_v_u32m1x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x2_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x2_u32m1(data, 1),
+ vl);
+}
+
+__attribute__((used, retain)) void vluxseg2ei16_v_u32m2x2() {
+ auto indices = __riscv_vle16_v_u16m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg2ei16_v_u32m2x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x2_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x2_u32m2(data, 1),
+ vl);
+}
+
+// Unordered, segment 3
+__attribute__((used, retain)) void vluxseg3ei16_v_u32m1x3() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg3ei16_v_u32m1x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x3_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x3_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x3_u32m1(data, 2),
+ vl);
+}
+
+__attribute__((used, retain)) void vluxseg3ei16_v_u32m2x3() {
+ auto indices = __riscv_vle16_v_u16m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg3ei16_v_u32m2x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x3_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x3_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x3_u32m2(data, 2),
+ vl);
+}
+
+// Unordered, segment 4
+__attribute__((used, retain)) void vluxseg4ei16_v_u32m1x4() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg4ei16_v_u32m1x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x4_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x4_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x4_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x4_u32m1(data, 3),
+ vl);
+}
+
+__attribute__((used, retain)) void vluxseg4ei16_v_u32m2x4() {
+ auto indices = __riscv_vle16_v_u16m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg4ei16_v_u32m2x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x4_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x4_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x4_u32m2(data, 2),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 3, __riscv_vget_v_u32m2x4_u32m2(data, 3),
+ vl);
+}
+
+// Ordered, segment 5
+__attribute__((used, retain)) void vluxseg5ei16_v_u32m1x5() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once c ompiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg5ei16_v_u32m1x5(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x5_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x5_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x5_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x5_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x5_u32m1(data, 4),
+ vl);
+}
+
+// Ordered, segment 6
+__attribute__((used, retain)) void vluxseg6ei16_v_u32m1x6() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg6ei16_v_u32m1x6(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x6_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x6_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x6_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x6_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x6_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x6_u32m1(data, 5),
+ vl);
+}
+
+// Unordered, segment 7
+__attribute__((used, retain)) void vluxseg7ei16_v_u32m1x7() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg7ei16_v_u32m1x7(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x7_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x7_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x7_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x7_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x7_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x7_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x7_u32m1(data, 6),
+ vl);
+}
+
+// Unordered, segment 8
+__attribute__((used, retain)) void vluxseg8ei16_v_u32m1x8() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg8ei16_v_u32m1x8(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x8_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x8_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x8_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x8_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x8_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x8_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x8_u32m1(data, 6),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 7, __riscv_vget_v_u32m1x8_u32m1(data, 7),
+ vl);
+}
+
+// Ordered, segment 2
+__attribute__((used, retain)) void vloxseg2ei16_v_u32m1x2() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg2ei16_v_u32m1x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x2_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x2_u32m1(data, 1),
+ vl);
+}
+
+__attribute__((used, retain)) void vloxseg2ei16_v_u32m2x2() {
+ auto indices = __riscv_vle16_v_u16m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg2ei16_v_u32m2x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x2_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x2_u32m2(data, 1),
+ vl);
+}
+
+// Ordered, segment 3
+__attribute__((used, retain)) void vloxseg3ei16_v_u32m1x3() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg3ei16_v_u32m1x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x3_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x3_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x3_u32m1(data, 2),
+ vl);
+}
+
+__attribute__((used, retain)) void vloxseg3ei16_v_u32m2x3() {
+ auto indices = __riscv_vle16_v_u16m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg3ei16_v_u32m2x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x3_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x3_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x3_u32m2(data, 2),
+ vl);
+}
+
+// Ordered, segment 4
+__attribute__((used, retain)) void vloxseg4ei16_v_u32m1x4() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg4ei16_v_u32m1x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x4_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x4_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x4_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x4_u32m1(data, 3),
+ vl);
+}
+
+__attribute__((used, retain)) void vloxseg4ei16_v_u32m2x4() {
+ auto indices = __riscv_vle16_v_u16m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg4ei16_v_u32m2x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x4_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x4_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x4_u32m2(data, 2),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 3, __riscv_vget_v_u32m2x4_u32m2(data, 3),
+ vl);
+}
+
+// Ordered, segment 5
+__attribute__((used, retain)) void vloxseg5ei16_v_u32m1x5() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg5ei16_v_u32m1x5(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x5_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x5_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x5_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x5_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x5_u32m1(data, 4),
+ vl);
+}
+
+// Ordered, segment 6
+__attribute__((used, retain)) void vloxseg6ei16_v_u32m1x6() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg6ei16_v_u32m1x6(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x6_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x6_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x6_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x6_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x6_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x6_u32m1(data, 5),
+ vl);
+}
+
+// Ordered, segment 7
+__attribute__((used, retain)) void vloxseg7ei16_v_u32m1x7() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg7ei16_v_u32m1x7(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x7_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x7_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x7_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x7_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x7_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x7_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x7_u32m1(data, 6),
+ vl);
+}
+
+// Ordered, segment 8
+__attribute__((used, retain)) void vloxseg8ei16_v_u32m1x8() {
+ auto indices = __riscv_vle16_v_u16mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg8ei16_v_u32m1x8(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x8_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x8_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x8_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x8_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x8_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x8_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x8_u32m1(data, 6),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 7, __riscv_vget_v_u32m1x8_u32m1(data, 7),
+ vl);
+}
+}
+
+void (*impl)() __attribute__((section(".data"))) = &vluxseg2ei16_v_u32m1x2;
+
+int main(int argc, char** argv) {
+ impl();
+ return 0;
+}
diff --git a/tests/cocotb/rvv/load_store/load32_index8_seg.cc b/tests/cocotb/rvv/load_store/load32_index8_seg.cc
new file mode 100644
index 0000000..5aefdee
--- /dev/null
+++ b/tests/cocotb/rvv/load_store/load32_index8_seg.cc
@@ -0,0 +1,369 @@
+// Copyright 2025 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#include <riscv_vector.h>
+#include <stdint.h>
+
+namespace {
+constexpr size_t lut_size = 271;
+// Double sized so we can check trailing regions are not read/written.
+constexpr size_t buf_size = 64;
+} // namespace
+
+size_t vl __attribute__((section(".data"))) = 4;
+// Indices are always unsigned.
+uint8_t index_buf[buf_size] __attribute__((section(".data")));
+// These instructions don't differentiate signed/unsigned so we only need to
+// test one. The types come from intrinsic level.
+uint32_t in_buf[lut_size] __attribute__((section(".data")));
+uint32_t out_buf[buf_size] __attribute__((section(".data")));
+
+extern "C" {
+// Unordered, segment 2
+__attribute__((used, retain)) void vluxseg2ei8_v_u32m1x2() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg2ei8_v_u32m1x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x2_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x2_u32m1(data, 1),
+ vl);
+}
+
+__attribute__((used, retain)) void vluxseg2ei8_v_u32m2x2() {
+ auto indices = __riscv_vle8_v_u8mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg2ei8_v_u32m2x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x2_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x2_u32m2(data, 1),
+ vl);
+}
+
+__attribute__((used, retain)) void vluxseg2ei8_v_u32m4x2() {
+ auto indices = __riscv_vle8_v_u8m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg2ei8_v_u32m4x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m4(out_buf, __riscv_vget_v_u32m4x2_u32m4(data, 0), vl);
+ __riscv_vse32_v_u32m4(out_buf + vl, __riscv_vget_v_u32m4x2_u32m4(data, 1),
+ vl);
+}
+
+// Unordered, segment 3
+__attribute__((used, retain)) void vluxseg3ei8_v_u32m1x3() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg3ei8_v_u32m1x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x3_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x3_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x3_u32m1(data, 2),
+ vl);
+}
+
+__attribute__((used, retain)) void vluxseg3ei8_v_u32m2x3() {
+ auto indices = __riscv_vle8_v_u8mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg3ei8_v_u32m2x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x3_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x3_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x3_u32m2(data, 2),
+ vl);
+}
+
+// Unordered, segment 4
+__attribute__((used, retain)) void vluxseg4ei8_v_u32m1x4() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg4ei8_v_u32m1x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x4_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x4_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x4_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x4_u32m1(data, 3),
+ vl);
+}
+
+__attribute__((used, retain)) void vluxseg4ei8_v_u32m2x4() {
+ auto indices = __riscv_vle8_v_u8mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg4ei8_v_u32m2x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x4_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x4_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x4_u32m2(data, 2),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 3, __riscv_vget_v_u32m2x4_u32m2(data, 3),
+ vl);
+}
+
+// Unordered, segment 5
+__attribute__((used, retain)) void vluxseg5ei8_v_u32m1x5() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg5ei8_v_u32m1x5(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x5_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x5_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x5_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x5_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x5_u32m1(data, 4),
+ vl);
+}
+
+// Unordered, segment 6
+__attribute__((used, retain)) void vluxseg6ei8_v_u32m1x6() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg6ei8_v_u32m1x6(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x6_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x6_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x6_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x6_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x6_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x6_u32m1(data, 5),
+ vl);
+}
+
+// Unordered, segment 7
+__attribute__((used, retain)) void vluxseg7ei8_v_u32m1x7() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg7ei8_v_u32m1x7(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x7_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x7_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x7_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x7_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x7_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x7_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x7_u32m1(data, 6),
+ vl);
+}
+
+// Unordered, segment 8
+__attribute__((used, retain)) void vluxseg8ei8_v_u32m1x8() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vluxseg8ei8_v_u32m1x8(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x8_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x8_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x8_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x8_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x8_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x8_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x8_u32m1(data, 6),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 7, __riscv_vget_v_u32m1x8_u32m1(data, 7),
+ vl);
+}
+
+// Ordered, segment 2
+__attribute__((used, retain)) void vloxseg2ei8_v_u32m1x2() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg2ei8_v_u32m1x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x2_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x2_u32m1(data, 1),
+ vl);
+}
+
+__attribute__((used, retain)) void vloxseg2ei8_v_u32m2x2() {
+ auto indices = __riscv_vle8_v_u8mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg2ei8_v_u32m2x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x2_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x2_u32m2(data, 1),
+ vl);
+}
+
+__attribute__((used, retain)) void vloxseg2ei8_v_u32m4x2() {
+ auto indices = __riscv_vle8_v_u8m1(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg2ei8_v_u32m4x2(in_buf, indices, vl);
+ __riscv_vse32_v_u32m4(out_buf, __riscv_vget_v_u32m4x2_u32m4(data, 0), vl);
+ __riscv_vse32_v_u32m4(out_buf + vl, __riscv_vget_v_u32m4x2_u32m4(data, 1),
+ vl);
+}
+
+// Ordered, segment 3
+__attribute__((used, retain)) void vloxseg3ei8_v_u32m1x3() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg3ei8_v_u32m1x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x3_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x3_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x3_u32m1(data, 2),
+ vl);
+}
+
+__attribute__((used, retain)) void vloxseg3ei8_v_u32m2x3() {
+ auto indices = __riscv_vle8_v_u8mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg3ei8_v_u32m2x3(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x3_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x3_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x3_u32m2(data, 2),
+ vl);
+}
+
+// Ordered, segment 4
+__attribute__((used, retain)) void vloxseg4ei8_v_u32m1x4() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg4ei8_v_u32m1x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x4_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x4_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x4_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x4_u32m1(data, 3),
+ vl);
+}
+
+__attribute__((used, retain)) void vloxseg4ei8_v_u32m2x4() {
+ auto indices = __riscv_vle8_v_u8mf2(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg4ei8_v_u32m2x4(in_buf, indices, vl);
+ __riscv_vse32_v_u32m2(out_buf, __riscv_vget_v_u32m2x4_u32m2(data, 0), vl);
+ __riscv_vse32_v_u32m2(out_buf + vl, __riscv_vget_v_u32m2x4_u32m2(data, 1),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 2, __riscv_vget_v_u32m2x4_u32m2(data, 2),
+ vl);
+ __riscv_vse32_v_u32m2(out_buf + vl * 3, __riscv_vget_v_u32m2x4_u32m2(data, 3),
+ vl);
+}
+
+// Ordered, segment 5
+__attribute__((used, retain)) void vloxseg5ei8_v_u32m1x5() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg5ei8_v_u32m1x5(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x5_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x5_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x5_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x5_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x5_u32m1(data, 4),
+ vl);
+}
+
+// Ordered, segment 6
+__attribute__((used, retain)) void vloxseg6ei8_v_u32m1x6() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg6ei8_v_u32m1x6(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x6_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x6_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x6_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x6_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x6_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x6_u32m1(data, 5),
+ vl);
+}
+
+// Ordered, segment 7
+__attribute__((used, retain)) void vloxseg7ei8_v_u32m1x7() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg7ei8_v_u32m1x7(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x7_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x7_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x7_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x7_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x7_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x7_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x7_u32m1(data, 6),
+ vl);
+}
+
+// Ordered, segment 8
+__attribute__((used, retain)) void vloxseg8ei8_v_u32m1x8() {
+ auto indices = __riscv_vle8_v_u8mf4(index_buf, vl);
+ // TODO(davidgao): Remove once compiler bug is eliminated
+ asm volatile("" ::: "vtype");
+ auto data = __riscv_vloxseg8ei8_v_u32m1x8(in_buf, indices, vl);
+ __riscv_vse32_v_u32m1(out_buf, __riscv_vget_v_u32m1x8_u32m1(data, 0), vl);
+ __riscv_vse32_v_u32m1(out_buf + vl, __riscv_vget_v_u32m1x8_u32m1(data, 1),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 2, __riscv_vget_v_u32m1x8_u32m1(data, 2),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 3, __riscv_vget_v_u32m1x8_u32m1(data, 3),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 4, __riscv_vget_v_u32m1x8_u32m1(data, 4),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 5, __riscv_vget_v_u32m1x8_u32m1(data, 5),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 6, __riscv_vget_v_u32m1x8_u32m1(data, 6),
+ vl);
+ __riscv_vse32_v_u32m1(out_buf + vl * 7, __riscv_vget_v_u32m1x8_u32m1(data, 7),
+ vl);
+}
+}
+
+void (*impl)() __attribute__((section(".data"))) = &vluxseg2ei8_v_u32m1x2;
+
+int main(int argc, char** argv) {
+ impl();
+ return 0;
+}
diff --git a/tests/cocotb/rvv_load_store_test.py b/tests/cocotb/rvv_load_store_test.py
index 64610c9..424a247 100644
--- a/tests/cocotb/rvv_load_store_test.py
+++ b/tests/cocotb/rvv_load_store_test.py
@@ -1734,6 +1734,161 @@
index_dtype = np.uint8,
)
+@cocotb.test()
+async def load32_index8_seg(dut):
+ """Test vl*xseg*ei32_v_u32 usage accessible from intrinsics."""
+ def make_test_case(impl: str, vl: int, n_segs: int):
+ return {
+ 'impl': impl,
+ 'vl': vl,
+ 'segments': n_segs,
+ 'in_bytes': 271,
+ 'out_size': vl * n_segs * 2,
+ }
+
+ await vector_load_segmented_indexed(
+ dut = dut,
+ elf_name = 'load32_index8_seg.elf',
+ cases = [
+ # Unordered, segment 2
+ make_test_case('vluxseg2ei8_v_u32m1x2', vl=4, n_segs=2),
+ make_test_case('vluxseg2ei8_v_u32m1x2', vl=3, n_segs=2),
+ make_test_case('vluxseg2ei8_v_u32m2x2', vl=8, n_segs=2),
+ make_test_case('vluxseg2ei8_v_u32m2x2', vl=7, n_segs=2),
+ make_test_case('vluxseg2ei8_v_u32m4x2', vl=16, n_segs=2),
+ make_test_case('vluxseg2ei8_v_u32m4x2', vl=15, n_segs=2),
+ # Unordered, segment 3
+ make_test_case('vluxseg3ei8_v_u32m1x3', vl=4, n_segs=3),
+ make_test_case('vluxseg3ei8_v_u32m1x3', vl=3, n_segs=3),
+ make_test_case('vluxseg3ei8_v_u32m2x3', vl=8, n_segs=3),
+ make_test_case('vluxseg3ei8_v_u32m2x3', vl=7, n_segs=3),
+ # Unordered, segment 4
+ make_test_case('vluxseg4ei8_v_u32m1x4', vl=4, n_segs=4),
+ make_test_case('vluxseg4ei8_v_u32m1x4', vl=3, n_segs=4),
+ make_test_case('vluxseg4ei8_v_u32m2x4', vl=8, n_segs=4),
+ make_test_case('vluxseg4ei8_v_u32m2x4', vl=7, n_segs=4),
+ # Unordered, segment 5
+ make_test_case('vluxseg5ei8_v_u32m1x5', vl=4, n_segs=5),
+ make_test_case('vluxseg5ei8_v_u32m1x5', vl=3, n_segs=5),
+ # Unordered, segment 6
+ make_test_case('vluxseg6ei8_v_u32m1x6', vl=4, n_segs=6),
+ make_test_case('vluxseg6ei8_v_u32m1x6', vl=3, n_segs=6),
+ # Unordered, segment 7
+ make_test_case('vluxseg7ei8_v_u32m1x7', vl=4, n_segs=7),
+ make_test_case('vluxseg7ei8_v_u32m1x7', vl=3, n_segs=7),
+ # Unordered, segment 8
+ make_test_case('vluxseg8ei8_v_u32m1x8', vl=4, n_segs=8),
+ make_test_case('vluxseg8ei8_v_u32m1x8', vl=3, n_segs=8),
+ # Ordered, segment 2
+ make_test_case('vloxseg2ei8_v_u32m1x2', vl=4, n_segs=2),
+ make_test_case('vloxseg2ei8_v_u32m1x2', vl=3, n_segs=2),
+ make_test_case('vloxseg2ei8_v_u32m2x2', vl=8, n_segs=2),
+ make_test_case('vloxseg2ei8_v_u32m2x2', vl=7, n_segs=2),
+ make_test_case('vloxseg2ei8_v_u32m4x2', vl=16, n_segs=2),
+ make_test_case('vloxseg2ei8_v_u32m4x2', vl=15, n_segs=2),
+ # Ordered, segment 3
+ make_test_case('vloxseg3ei8_v_u32m1x3', vl=4, n_segs=3),
+ make_test_case('vloxseg3ei8_v_u32m1x3', vl=3, n_segs=3),
+ make_test_case('vloxseg3ei8_v_u32m2x3', vl=8, n_segs=3),
+ make_test_case('vloxseg3ei8_v_u32m2x3', vl=7, n_segs=3),
+ # Ordered, segment 4
+ make_test_case('vloxseg4ei8_v_u32m1x4', vl=4, n_segs=4),
+ make_test_case('vloxseg4ei8_v_u32m1x4', vl=3, n_segs=4),
+ make_test_case('vloxseg4ei8_v_u32m2x4', vl=8, n_segs=4),
+ make_test_case('vloxseg4ei8_v_u32m2x4', vl=7, n_segs=4),
+ # Ordered, segment 5
+ make_test_case('vloxseg5ei8_v_u32m1x5', vl=4, n_segs=5),
+ make_test_case('vloxseg5ei8_v_u32m1x5', vl=3, n_segs=5),
+ # Ordered, segment 6
+ make_test_case('vloxseg6ei8_v_u32m1x6', vl=4, n_segs=6),
+ make_test_case('vloxseg6ei8_v_u32m1x6', vl=3, n_segs=6),
+ # Ordered, segment 7
+ make_test_case('vloxseg7ei8_v_u32m1x7', vl=4, n_segs=7),
+ make_test_case('vloxseg7ei8_v_u32m1x7', vl=3, n_segs=7),
+ # Ordered, segment 8
+ make_test_case('vloxseg8ei8_v_u32m1x8', vl=4, n_segs=8),
+ make_test_case('vloxseg8ei8_v_u32m1x8', vl=3, n_segs=8),
+ ],
+ dtype = np.uint32,
+ index_dtype = np.uint8,
+ )
+
+@cocotb.test()
+async def load32_index16_seg(dut):
+ """Test vl*xseg*ei32_v_u32 usage accessible from intrinsics."""
+ def make_test_case(impl: str, vl: int, n_segs: int):
+ return {
+ 'impl': impl,
+ 'vl': vl,
+ 'segments': n_segs,
+ 'in_bytes': 28000,
+ 'out_size': vl * n_segs * 2,
+ }
+
+ await vector_load_segmented_indexed(
+ dut = dut,
+ elf_name = 'load32_index16_seg.elf',
+ cases = [
+ # Unordered, segment 2
+ make_test_case('vluxseg2ei16_v_u32m1x2', vl=4, n_segs=2),
+ make_test_case('vluxseg2ei16_v_u32m1x2', vl=3, n_segs=2),
+ make_test_case('vluxseg2ei16_v_u32m2x2', vl=8, n_segs=2),
+ make_test_case('vluxseg2ei16_v_u32m2x2', vl=7, n_segs=2),
+ # Unordered, segment 3
+ make_test_case('vluxseg3ei16_v_u32m1x3', vl=4, n_segs=3),
+ make_test_case('vluxseg3ei16_v_u32m1x3', vl=3, n_segs=3),
+ make_test_case('vluxseg3ei16_v_u32m2x3', vl=8, n_segs=3),
+ make_test_case('vluxseg3ei16_v_u32m2x3', vl=7, n_segs=3),
+ # Unordered, segment 4
+ make_test_case('vluxseg4ei16_v_u32m1x4', vl=4, n_segs=4),
+ make_test_case('vluxseg4ei16_v_u32m1x4', vl=3, n_segs=4),
+ make_test_case('vluxseg4ei16_v_u32m2x4', vl=8, n_segs=4),
+ make_test_case('vluxseg4ei16_v_u32m2x4', vl=7, n_segs=4),
+ # Unordered, segment 5
+ make_test_case('vluxseg5ei16_v_u32m1x5', vl=4, n_segs=5),
+ make_test_case('vluxseg5ei16_v_u32m1x5', vl=3, n_segs=5),
+ # Unordered, segment 6
+ make_test_case('vluxseg6ei16_v_u32m1x6', vl=4, n_segs=6),
+ make_test_case('vluxseg6ei16_v_u32m1x6', vl=3, n_segs=6),
+ # Unordered, segment 7
+ make_test_case('vluxseg7ei16_v_u32m1x7', vl=4, n_segs=7),
+ make_test_case('vluxseg7ei16_v_u32m1x7', vl=3, n_segs=7),
+ # Unordered, segment 8
+ make_test_case('vluxseg8ei16_v_u32m1x8', vl=4, n_segs=8),
+ make_test_case('vluxseg8ei16_v_u32m1x8', vl=3, n_segs=8),
+ # Ordered, segment 2
+ make_test_case('vloxseg2ei16_v_u32m1x2', vl=4, n_segs=2),
+ make_test_case('vloxseg2ei16_v_u32m1x2', vl=3, n_segs=2),
+ make_test_case('vloxseg2ei16_v_u32m2x2', vl=8, n_segs=2),
+ make_test_case('vloxseg2ei16_v_u32m2x2', vl=7, n_segs=2),
+ # Ordered, segment 3
+ make_test_case('vloxseg3ei16_v_u32m1x3', vl=4, n_segs=3),
+ make_test_case('vloxseg3ei16_v_u32m1x3', vl=3, n_segs=3),
+ make_test_case('vloxseg3ei16_v_u32m2x3', vl=8, n_segs=3),
+ make_test_case('vloxseg3ei16_v_u32m2x3', vl=7, n_segs=3),
+ # Ordered, segment 4
+ make_test_case('vloxseg4ei16_v_u32m1x4', vl=4, n_segs=4),
+ make_test_case('vloxseg4ei16_v_u32m1x4', vl=3, n_segs=4),
+ make_test_case('vloxseg4ei16_v_u32m2x4', vl=8, n_segs=4),
+ make_test_case('vloxseg4ei16_v_u32m2x4', vl=7, n_segs=4),
+ # Ordered, segment 5
+ make_test_case('vloxseg5ei16_v_u32m1x5', vl=4, n_segs=5),
+ make_test_case('vloxseg5ei16_v_u32m1x5', vl=3, n_segs=5),
+ # Ordered, segment 6
+ make_test_case('vloxseg6ei16_v_u32m1x6', vl=4, n_segs=6),
+ make_test_case('vloxseg6ei16_v_u32m1x6', vl=3, n_segs=6),
+ # Ordered, segment 7
+ make_test_case('vloxseg7ei16_v_u32m1x7', vl=4, n_segs=7),
+ make_test_case('vloxseg7ei16_v_u32m1x7', vl=3, n_segs=7),
+ # Ordered, segment 8
+ make_test_case('vloxseg8ei16_v_u32m1x8', vl=4, n_segs=8),
+ make_test_case('vloxseg8ei16_v_u32m1x8', vl=3, n_segs=8),
+ ],
+ dtype = np.uint32,
+ index_dtype = np.uint16,
+ )
+
+
@cocotb.test()
async def load32_index32_seg(dut):
