| commit | 54f4343593b76b78de676f18b7790874d83a3029 | [log] [tgz] |
|---|---|---|
| author | Derek Chow <derekjchow@google.com> | Wed Feb 28 19:28:50 2024 -0800 |
| committer | Derek Chow <derekjchow@google.com> | Tue Mar 05 13:30:43 2024 -0800 |
| tree | 2bfd5a64688f2720be5210ea5c5fc53e9f9e5f8b | |
| parent | b1b3c69bc4062b8d88d56265e210072b0a969ce0 [diff] |
Refactor Bru - Use ChiselEnum - Combine intermediate state into one register - Use Chisel MuxCase/MuxLookup for readability. Change-Id: I889cfc661409a2a86f3fdc79693574836171f078
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog