| commit | b1b3c69bc4062b8d88d56265e210072b0a969ce0 | [log] [tgz] |
|---|---|---|
| author | Derek Chow <derekjchow@google.com> | Mon Feb 26 22:56:07 2024 -0800 |
| committer | Derek Chow <derekjchow@google.com> | Tue Mar 05 13:30:05 2024 -0800 |
| tree | d1423fb1959f0bce72591a44446a9cc9a0589f3a | |
| parent | b754f7c18c648a0a4a89b057d6d30b3679e18b30 [diff] |
[Reland] Add option to disable VCore. Change-Id: Ife4f7c63e0110ead0e34d55e7d562375b37652fa
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog