commit | c2c02f7ed3decad9fbb33e24fb2c59cc926e4a8d | [log] [tgz] |
---|---|---|
author | David Gao <davidgao@google.com> | Thu Sep 18 17:14:21 2025 +0000 |
committer | David Gao <davidgao@google.com> | Thu Sep 18 13:03:43 2025 -0700 |
tree | 73c6c55bb112cda6346c4f4e92b83053f52625b0 | |
parent | 4aa97a944ac2c5c399d2f05a77fcfd0a27352c0e [diff] |
Add vsseg*e16/32 tests Change-Id: I7d38628c389743c1d0bf335e3cfdc7518ddeb20d
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog