feat(dv): Add Python-based SPI loader for Verilator

This commit introduces a Python-based toolchain for loading and running software on the Verilator simulation of the Kelvin SoC. This toolchain interacts with the `spi_dpi_master` via its TCP socket interface.

The new toolchain in `utils/kelvin_soc_loader/` includes:
- **`spi_driver.py`**: A Python client library that connects to the DPI server and provides a high-level API for SPI operations (read/write/poll registers, bulk data transfer).
- **`loader.py`**: An application that uses the `spi_driver` to parse an ELF file, load its segments into the SoC's memory through the simulated SPI bridge, and then start the core's execution.
- **`run_simulation.py`**: An orchestration script that manages the entire simulation and loading flow. It starts the Verilator binary, waits for the DPI server to initialize, executes the loader script, and manages the simulation runtime.

This provides a complete, scriptable workflow for running software tests on the hardware design in a simulation environment, greatly improving the development and verification loop.

Change-Id: I950efdff040c49502cc74e4b7ad71ed5e3c9124c
4 files changed
tree: 7db367673cfd79e7b172598b79bb635a6d8744a4
  1. doc/
  2. examples/
  3. external/
  4. fpga/
  5. hdl/
  6. hw_sim/
  7. kelvin_test_utils/
  8. lib/
  9. platforms/
  10. rules/
  11. tests/
  12. third_party/
  13. toolchain/
  14. utils/
  15. .bazelrc
  16. .bazelversion
  17. .gitignore
  18. CONTRIBUTING.md
  19. LICENSE
  20. PREUPLOAD.cfg
  21. README.md
  22. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog