| commit | bd17df6889057b8ccdbc09561ce5bcd0a15a29d9 | [log] [tgz] |
|---|---|---|
| author | Derek Chow <derekjchow@google.com> | Fri Feb 23 21:54:28 2024 -0800 |
| committer | Derek Chow <derekjchow@google.com> | Thu Feb 29 15:52:44 2024 -0800 |
| tree | 75f96ff9e94c1cf08994f75a7dd07aff338e546b | |
| parent | d81274eff3b567cf1ea28b6ec181889c1be5d1c6 [diff] |
Refactor Decoder. - Create "DecodedInstruction" data type. - Convert "DecodedInstruction" module into "DecodeInstruction" function. - Move Alu, Mlu, Csr, Dvu, Lsu and VCore to ChiselEnum. - Introduce use of move Valid/Decoupled interfaces. Change-Id: Ia0f1299b17bcf2e0dd4486b94d516297f9f15fb0
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog