| commit | bcfd82f48e86c9749706b15e7b0e804c843bd9a9 | [log] [tgz] |
|---|---|---|
| author | tianyu.li <tianyu.li@verisilicon.com> | Tue Jan 21 21:31:54 2025 +0800 |
| committer | Derek Chow <derekjchow@google.com> | Thu Mar 06 14:56:41 2025 -0800 |
| tree | d6b0578a94aca517dfea7a056dce1d6b2d8b8fdf | |
| parent | 734ed668ddf52c1fd26ee8e2f5c14422f429663a [diff] |
fix bugs for mask-logic, vcpop instructions; Change-Id: Ica3542103ffe208d29bfefdbafe24de5fce065b7
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog