Parameterize Kelvin over instructionLanes - Many things in Kelvin were hard-coded to operate on 4 instruction lanes -- refactor those to be flexible based on the instructionLanes value in Parameters Change-Id: I1957d87b6f355d815380a88c28d210c1c8eec737
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog