hdl/chisel/src/kelvin/ClockGate.scala

// Copyright 2023 Google LLC
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

package kelvin

import chisel3._
import chisel3.util._
import common._

class ClockGate extends BlackBox {
  val io = IO(new Bundle {
    val clk_i  = Input(Clock())
    val enable = Input(Bool())  // '1' passthrough, '0' disable.
    val clk_o  = Output(Clock())
  })
}