| From ef9fc3a958b478b46a6cb692e9a873a491a5b86a Mon Sep 17 00:00:00 2001 |
| From: Alex Van Damme <atv@google.com> |
| Date: Wed, 19 Mar 2025 15:39:02 -0700 |
| Subject: [PATCH 3/3] Export vdb via undeclared test outputs |
| |
| --- |
| cocotb/cocotb.bzl | 3 ++- |
| 1 file changed, 2 insertions(+), 1 deletion(-) |
| |
| diff --git a/cocotb/cocotb.bzl b/cocotb/cocotb.bzl |
| index be35f98..daa3987 100644 |
| --- a/cocotb/cocotb.bzl |
| +++ b/cocotb/cocotb.bzl |
| @@ -160,7 +160,8 @@ def _get_test_command(ctx, verilog_files, vhdl_files): |
| verbose_args + |
| waves_args + |
| seed_args + |
| - test_module_args |
| + test_module_args + |
| + ("&& cp -fr `pwd`/sim_build/simv.vdb $TEST_UNDECLARED_OUTPUTS_DIR" if ctx.attr.sim_name == "vcs" else "") |
| ) |
| |
| if ctx.attr.sim_name == "verilator": |
| -- |
| 2.43.5 |
| |