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opensecura / hw / kelvin / c0600ce66c09cd536a49d88eb3cb1aaf788dcbc8
commitc0600ce66c09cd536a49d88eb3cb1aaf788dcbc8[log] [tgz]
authorpu.wang <pu.wang@verisilicon.com>Mon Jul 14 14:48:32 2025 +0800
committerDerek Chow <derekjchow@google.com>Tue Aug 05 10:49:42 2025 -0700
tree501084a12115d95d294bdd8abfd117c5872ead2e
parent150b1ae6e6718e363331ea498e45bd7b1f529231 [diff]
update backend exclusion files

Change-Id: I339fadbd71cb3de50c74d570e20391e0b28327c2
2 files changed
tree: 501084a12115d95d294bdd8abfd117c5872ead2e
  1. doc/
  2. examples/
  3. external/
  4. hdl/
  5. hw_sim/
  6. kelvin_test_utils/
  7. lib/
  8. platforms/
  9. rules/
  10. tests/
  11. third_party/
  12. toolchain/
  13. utils/
  14. .bazelrc
  15. .bazelversion
  16. .gitignore
  17. CONTRIBUTING.md
  18. LICENSE
  19. PREUPLOAD.cfg
  20. README.md
  21. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

  • If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
  • If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog