commit | 42785799aa364a7bc34057db3e3c4bf9d5c2a744 | [log] [tgz] |
---|---|---|
author | Derek Chow <derekjchow@google.com> | Wed Sep 03 18:23:03 2025 -0700 |
committer | Derek Chow <derekjchow@google.com> | Wed Sep 03 19:04:25 2025 -0700 |
tree | e630d7ac626020d654aa8050a0c56d2b2c0f3391 | |
parent | dfae871cf536ca69b522223194a3ed22e17a791a [diff] |
Mask LsuV2 regfile writes based on faults. Change-Id: I5903a12366394c0cbfa51736db97b59061bb5915
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog