commit | 7759a66faa0121563684b83fabb179db5f0ca410 | [log] [tgz] |
---|---|---|
author | David Gao <davidgao@google.com> | Wed Sep 17 21:29:17 2025 +0000 |
committer | David Gao <davidgao@google.com> | Wed Sep 17 22:46:36 2025 +0000 |
tree | 2d83b156bdab41a6e94e5216c930d09809e42c01 | |
parent | 6178d5da9da877f4565553b9e3b5985e30fde842 [diff] |
Consolidate load8/16/32 segmented test cases And add more coverage on the vlseg*. Minor fixes to other existing tests to make the binaries runnable without the test runtime. Change-Id: I5e6a6e9d439291ec44ef00610072e37b1a152613
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog