commit | 1f231dd09c1d2f33c491548e8aebbe64d0fbb1c9 | [log] [tgz] |
---|---|---|
author | Alex Van Damme <atv@google.com> | Wed Nov 13 11:19:22 2024 -0800 |
committer | Alex Van Damme <atv@google.com> | Wed Nov 13 11:19:22 2024 -0800 |
tree | abb202ced6f451736ce790cbcff4ea0d2c9d8d1e | |
parent | 24214f9063022ff005f42c8635997923a45d1f1e [diff] |
Adjust behavior of Mlu stages Change-Id: I8d67bfe5a6ab68d729c65d4bbdb29e446447aeac
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog