Adjust behavior of Mlu stages

Change-Id: I8d67bfe5a6ab68d729c65d4bbdb29e446447aeac
1 file changed
tree: abb202ced6f451736ce790cbcff4ea0d2c9d8d1e
  1. doc/
  2. external/
  3. hdl/
  4. lib/
  5. rules/
  6. tests/
  7. third_party/
  8. utils/
  9. .bazelrc
  10. .bazelversion
  11. .gitignore
  12. CONTRIBUTING.md
  13. LICENSE
  14. PREUPLOAD.cfg
  15. README.md
  16. WORKSPACE
README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Building

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog