| commit | 24214f9063022ff005f42c8635997923a45d1f1e | [log] [tgz] |
|---|---|---|
| author | David Gao <davidgao@google.com> | Fri Nov 08 00:13:54 2024 +0000 |
| committer | David Gao <davidgao@google.com> | Fri Nov 08 04:22:40 2024 +0000 |
| tree | bae66c5237cff61c96953a365f6f6668fd2b3440 | |
| parent | 44bfe32ff74fb0309d1fc3f74a4acfb300f1c26c [diff] |
Add MakeWireBundle This allows Bundle (wire) instances to be created and (partially) connected in one call, and provides some readability improvements: - avoid repeating the name of the instance - avoid naming the instance if we're just going to return it This change applies the trick to common/Library and rvv only. Change-Id: I56a7f220f6de63920d55227e23e5f7955b2d4b33
Kelvin is a RISC-V32IM core with a custom instruction set.
More information on the design can be found in the overview.
Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:
bazel build //tests/verilator_sim:core_sim
The verilog source for the Kelvin core can be generated using:
bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog
Verilog source for the Matcha SoC can be generated using:
bazel clean --expunge # To generate the ToT sha bazel build //hdl/chisel:matcha_kelvin_verilog