commit	096bfb919e8c58d6e6cc790f0bba079e5f27dc07	[log] [tgz]
author	mingzhe.chen <mingzhe.chen@verisilicon.com>	Fri Jun 27 17:02:40 2025 +0800
committer	Derek Chow <derekjchow@google.com>	Thu Jul 10 16:19:47 2025 -0700
tree	fd783f3b714ce96fa36d290da0c3ab1b0a3bcebb
parent	f7bfda132eb8392d75dc7e4ceafc6fa62d9509f3 [diff]

tree: fd783f3b714ce96fa36d290da0c3ab1b0a3bcebb

README.md

Kelvin

Kelvin is a RISC-V32IM core with a custom instruction set.

Kelvin block diagram

More information on the design can be found in the overview.

Getting Started

If you are hardware engineer looking to integrate Kelvin into your design, check out our integration guide.
If you are a software engineer looking to write code for Kelvin, start with this tutorial.

Kelvin uses bazel as it's build system. The Verilated simulator for Kelvin can be generated using:

bazel build //tests/verilator_sim:core_sim

The verilog source for the Kelvin core can be generated using:

bazel build //hdl/chisel/src/kelvin:core_cc_library_emit_verilog

Verilog source for the Matcha SoC can be generated using:

bazel clean --expunge  # To generate the ToT sha
bazel build //hdl/chisel:matcha_kelvin_verilog