Cleanup SIMD vector length setting Simplify the logic. Change-Id: I9e295bfb494b5abff2ff383c2fdab7d221e7b7bd
diff --git a/hdl/chisel/src/kelvin/Parameters.scala b/hdl/chisel/src/kelvin/Parameters.scala index 2024883..4d1ab66 100644 --- a/hdl/chisel/src/kelvin/Parameters.scala +++ b/hdl/chisel/src/kelvin/Parameters.scala
@@ -10,7 +10,12 @@ val big = 2 } - val core = sys.env.get("KELVIN_SIMD").getOrElse("256").toInt match { + // Vector Length (register-file and compute). + // 128 = faster builds, but not production(?). + val vectorBits = sys.env.get("KELVIN_SIMD").getOrElse("256").toInt + assert(vectorBits == 512 || vectorBits == 256 || vectorBits == 128) + + val core = vectorBits match { case 128 => Core.tiny case 256 => Core.little case 512 => Core.big @@ -21,16 +26,7 @@ val instructionBits = 32 val instructionLanes = 4 - // Vector Length (register-file and compute). - val vectorBits = core match { - case Core.tiny => 128 - case Core.little => 256 - case Core.big => 512 - } - val vectorCountBits = log2Ceil(vectorBits / 8) + 1 + 2 // +2 stripmine - assert(vectorBits == 512 || vectorBits == 256 - || vectorBits == 128) // 128 = faster builds, but not production(?). // Vector queue. val vectorFifoDepth = 16
diff --git a/tests/verilator_sim/kelvin/kelvin_cfg.h b/tests/verilator_sim/kelvin/kelvin_cfg.h index ef2a2b5..424a507 100644 --- a/tests/verilator_sim/kelvin/kelvin_cfg.h +++ b/tests/verilator_sim/kelvin/kelvin_cfg.h
@@ -1,14 +1,12 @@ +// Copyright 2023 Google LLC. + #ifndef TESTS_VERILATOR_SIM_KELVIN_KELVIN_CFG_H_ #define TESTS_VERILATOR_SIM_KELVIN_KELVIN_CFG_H_ #ifndef KELVIN_SIMD #error KELVIN_SIMD must be defined in Environment or Makefile. -#elif KELVIN_SIMD == 128 -constexpr int kVector = 128; -#elif KELVIN_SIMD == 256 -constexpr int kVector = 256; -#elif KELVIN_SIMD == 512 -constexpr int kVector = 512; +#elif (KELVIN_SIMD == 128) || (KELVIN_SIMD == 256) || (KELVIN_SIMD == 512) +constexpr int kVector = KELVIN_SIMD; #else #error KELVIN_SIMD unsupported configuration. #endif